Architectures | |
edge_fal_arc | Architecture |
Standard falling edge detection. More... | |
Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
std_logic_arith | |
arithmetic operations on std_logic datatypes, see file | |
std_logic_unsigned | |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
Ports | |
CLK | in std_logic |
A | in std_logic |
PULSE | out std_logic |
Standard falling edge detection to provide possibility of detecting a transition in a non-clock signal
Definition at line 35 of file edge_fal.vhd.
ieee library [Library] |
std_logic_1164 package [Package] |
std_logic definitions, see file
Reimplemented in main_components.
Definition at line 26 of file edge_fal.vhd.
std_logic_arith package [Package] |
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 30 of file edge_fal.vhd.