udp_addresses Package Reference
Declarations of constants, types & functions for Ethernet modules. More...
Collaboration diagram for udp_addresses:
Functions | |
| std_logic_vector | reverse4byte ( a: in std_logic_vector(31 downto 0) ) |
| reverse the order of 4 bytes | |
| std_logic_vector | reverse_any_vector ( a: in std_logic_vector ) |
| bitwise reversal of a vector with arbitrary length | |
| std_logic_vector | cal_IP_chksum ( a: in std_logic_vector ) |
| calculate IP checksum | |
| std_logic_vector | cal_UDP_chksum_base ( a: in std_logic_vector ) |
| calculate basis for UDP checksum | |
| std_logic_vector | conf_tdaqport ( sel: in integer ) |
| config port | |
| std_logic_vector | conf_MAC ( sel: in integer ) |
| config MAC | |
| std_logic_vector | conf_IP ( ) |
| config IP | |
| std_logic_vector | conf_chksum_rdy ( ) |
| config magic number chksums | |
| std_logic_vector | conf_chksum_ovr ( ) |
| config magic number chksums | |
| std_logic_vector | conf_chksum_start ( ) |
| config magic number chksums | |
Libraries | |
| ieee | |
| standard IEEE library | |
| work | |
| Library with project specific headers. | |
Packages | |
| std_logic_1164 | |
| std_logic definitions, see file | |
| std_logic_arith | |
| arithmetic operations on std_logic datatypes, see file | |
| std_logic_unsigned | |
| unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
| main_components | Package <main_components> |
| Header with declarations of main design components. | |
| ipmac | Package <ipmac> |
| Header with IP & MAC addresses. | |
| build_parameters | Package <build_parameters> |
| Header with configs. | |
Constants | |
| MAC_broadcast | std_logic_vector ( 47 downto 0 ) := x " FF_FF_FF_FF_FF_FF " |
| broadcast MAC address | |
| src_MAC_1 | std_logic_vector ( 47 downto 0 ) := conf_MAC ( 1 ) |
| FPGA MAC address top. | |
| src_MAC_2 | std_logic_vector ( 47 downto 0 ) := conf_MAC ( 2 ) |
| FPGA MAC address bottom. | |
| des_MAC | std_logic_vector ( 47 downto 0 ) := MAC_sbcbcmtcc01 |
| PC MAC address. | |
| dcs_MAC | std_logic_vector ( 47 downto 0 ) := MAC_pcatlbcmscs |
| DCS PC MAC address. | |
| tdaq_MAC | std_logic_vector ( 47 downto 0 ) := MAC_sbcbcmtcc01 |
| TDAQ PC MAC address. | |
| src_IP_addr | std_logic_vector ( 31 downto 0 ) := conf_IP |
| FPGA IP address. | |
| dest_IP_addr | std_logic_vector ( 31 downto 0 ) := ip_sbcbcmtcc01 |
| PC IP address. | |
| rxsrcip | std_logic_vector ( 31 downto 0 ) := dest_IP_addr |
| PC IP address. | |
| dcs_IP_addr | std_logic_vector ( 31 downto 0 ) := ip_pcatlbcmscs |
| DCS PC IP address. | |
| tdaq_IP_addr | std_logic_vector ( 31 downto 0 ) := ip_sbcbcmtcc01 |
| TDAQ PC IP address. | |
| rxdestip | std_logic_vector ( 31 downto 0 ) := src_IP_addr |
| FPGA IP address. | |
| src_port | std_logic_vector ( 15 downto 0 ) := x " FFFF " |
| FPGA TX port. | |
| std_port | std_logic_vector ( 15 downto 0 ) := x " 0FF0 " |
| std sendto port | |
| dest_port | std_logic_vector ( 15 downto 0 ) := conf_tdaqport ( 0 ) |
| PC RX port for buffer dumps. | |
| rxsrc_port | std_logic_vector ( 15 downto 0 ) := x " FFFF " |
| PC TX port. | |
| dcs_port | std_logic_vector ( 15 downto 0 ) := x " FFF0 " |
| PC port for status messages. | |
| tdaq_port | std_logic_vector ( 15 downto 0 ) := conf_tdaqport ( 1 ) |
| PC port for status messages. | |
| rxdest_port | std_logic_vector ( 15 downto 0 ) := x " FFFF " |
| FPGA RX port. | |
| ethertype | std_logic_vector ( 15 downto 0 ) := x " 0800 " |
| Ethertype regular msg. | |
| arptype | std_logic_vector ( 15 downto 0 ) := x " 0806 " |
| Ethertype ARP msg. | |
| udp_protocol | std_logic_vector ( 7 downto 0 ) := x " 11 " |
| UDP protocol = IP protocol 17. | |
| raw_protocol | std_logic_vector ( 7 downto 0 ) := x " FA " |
| raw IP protocol 250 | |
| protocol | std_logic_vector ( 7 downto 0 ) := udp_protocol |
| protocol field | |
| IPV4 | std_logic_vector ( 3 downto 0 ) := x " 4 " |
| IP version 4. | |
| IHL | std_logic_vector ( 3 downto 0 ) := x " 5 " |
| IP header length = 5*32 bit = 160 = 20 byte. | |
| type_of_ser | std_logic_vector ( 7 downto 0 ) := zero_byte |
| type of service | |
| realdatalen | integer := 192 |
| length of actual data in bytes | |
| pktlen | integer := realdatalen +7 |
| packet length = actual data + 7 (ID & padding) | |
| dcsdatalen | integer := 212 |
| length of dcs data | |
| tdaqdatalen | integer := 141 |
| length of tdaq data | |
| ipheadlen | integer := 20 |
| length of IP head | |
| udpheadlen | integer := 8 |
| length of UDP head | |
| udp_length | std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( pktlen +udpheadlen , 16 ) |
| length of udp data msg, 199 byte body + 8 byte head | |
| tot_length | std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( pktlen +udpheadlen +ipheadlen , 16 ) |
| length of complete IP pkt, 207 byte udp-pkt + 20 byte IP head | |
| udp_dcs_length | std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( dcsdatalen +udpheadlen , 16 ) |
| length of udp dcs msg | |
| tot_dcs_length | std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( dcsdatalen +udpheadlen +ipheadlen , 16 ) |
| length of complete dcs msg | |
| udp_tdaq_length | std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( tdaqdatalen +udpheadlen , 16 ) |
| length of udp tdaq msg | |
| tot_tdaq_length | std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( tdaqdatalen +udpheadlen +ipheadlen , 16 ) |
| length of complete tdaq msg | |
| flags | std_logic_vector ( 2 downto 0 ) := " 010 " |
| IP flags. | |
| offset | std_logic_vector ( 12 downto 0 ) := zero_byte &zero_byte ( 4 downto 0 ) |
| fragmentation offset | |
| TTL | std_logic_vector ( 7 downto 0 ) := x " FF " |
| Time-to-live. | |
| id | std_logic_vector ( 15 downto 0 ) := x " 0000 " |
| IP identification. | |
| arp_ann_c | arp_pkt := ( htype = > x " 0001 " , ptype = > x " 0800 " , hlen = > x " 06 " , plen = > x " 04 " , operation = > x " 0001 " , sha = > src_MAC_1 , spa = > src_IP_addr , tha = > MAC_broadcast , tpa = > src_IP_addr ) |
| Gratuitous ARP message. | |
| pause | integer := 5000 |
| pause between packets | |
| cntwidth | integer := 19 |
| width for FSM count signal | |
| data | std_logic_vector ( 15 downto 0 ) := x " f0f0 " |
| dummy data pattern | |
| rd_rdy_pat | std_logic_vector ( 7 downto 0 ) := x " 10 " |
| pattern for read-out-ready packet | |
| rd_ovr_pat | std_logic_vector ( 7 downto 0 ) := x " 01 " |
| pattern for read-out-over packet | |
| ip_chksum | std_logic_vector ( 15 downto 0 ) := cal_IP_chksum ( IPV4 &IHL &type_of_ser &tot_length &id &flags &offset &TTL &protocol &x " 0000 " &src_IP_addr &dest_IP_addr ) |
| IP checksum. | |
| ip_chksum_dcs | std_logic_vector ( 15 downto 0 ) := cal_IP_chksum ( IPV4 &IHL &type_of_ser &tot_dcs_length &id &flags &offset &TTL &protocol &x " 0000 " &src_IP_addr &dcs_IP_addr ) |
| IP checksum for DCS status messages. | |
| ip_chksum_tdaq | std_logic_vector ( 15 downto 0 ) := cal_IP_chksum ( IPV4 &IHL &type_of_ser &tot_tdaq_length &id &flags &offset &TTL &protocol &x " 0000 " &src_IP_addr &tdaq_IP_addr ) |
| IP checksum for DCS status messages. | |
| udp_chksum_base | std_logic_vector ( 15 downto 0 ) := cal_UDP_chksum_base ( src_IP_addr &dest_IP_addr &zero_byte &protocol &udp_length &src_port &dest_port &udp_length &zero_byte &zero_byte ) |
| basis for UDP checksum | |
| udp_chksum_base_dcs | std_logic_vector ( 15 downto 0 ) := cal_UDP_chksum_base ( src_IP_addr &dcs_IP_addr &zero_byte &protocol &udp_dcs_length &src_port &dcs_port &udp_dcs_length &zero_byte &zero_byte ) |
| basis for UDP checksum for DCS status messages | |
| udp_chksum_base_tdaq | std_logic_vector ( 15 downto 0 ) := cal_UDP_chksum_base ( src_IP_addr &tdaq_IP_addr &zero_byte &protocol &udp_tdaq_length &src_port &tdaq_port &udp_tdaq_length &zero_byte &zero_byte ) |
| basis for UDP checksum for TDAQ status messages | |
| start_chksum | std_logic_vector ( 15 downto 0 ) := conf_chksum_start |
| UDP checksum of start package. | |
| rdy_chksum | std_logic_vector ( 15 downto 0 ) := conf_chksum_rdy |
| read-out-ready packet checksum | |
| ovr_chksum | std_logic_vector ( 15 downto 0 ) := conf_chksum_ovr |
| read-out-over packet checksum | |
Records | |
| arp_pkt : record | |
| 0htype | std_logic_vector ( 15 downto 0 ) |
| 1ptype | std_logic_vector ( 15 downto 0 ) |
| 2hlen | std_logic_vector ( 7 downto 0 ) |
| 3plen | std_logic_vector ( 7 downto 0 ) |
| 4operation | std_logic_vector ( 15 downto 0 ) |
| 5sha | std_logic_vector ( 47 downto 0 ) |
| 6spa | std_logic_vector ( 31 downto 0 ) |
| 7tha | std_logic_vector ( 47 downto 0 ) |
| 8tpa | std_logic_vector ( 31 downto 0 ) |
Aliases | |
| zero_byte | gnd_vec |
Detailed Description
Declarations of constants, types & functions for Ethernet modules.
Contains the declaration of all constants needed to fill the Ethernet packets according to IP & UDP protocols. The FSM in the ethernet_top.vhd module goes through these headers in byte-serial way.
IP header according to RFC 791:
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|Version|--IHL--|Type of Service|----------Total Length---------|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|---------Identification--------|Flags|------Fragment Offset----|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|--Time to Live-|----Protocol---|---------Header Checksum-------|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|-----------------------Source Address--------------------------|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|--------------------Destination Address------------------------|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|--------------------Options--------------------|----Padding----|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
UDP header according to RFC 768:
0 7 8 15 16 23 24 31
+--------+--------+--------+--------+
|-----Source------|---Destination---|
|------Port-------|------Port-------|
+--------+--------+--------+--------+
|-----Length------|----Checksum-----|
+--------+--------+--------+--------+
|------------data octets ...
+---------------- ...
When there's time, fix display of packet structures....
Hostnames & Addresses of FPGAs:
Board Host Name MAC Top MAC Bottom IP Top
Test-Beam FPGA-BCM-ROD-01 00_0A_35_01_9B_2C 00_0A_35_01_9B_2D 10.145.81.251
CERN 1 FPGA-BCM-ROD-02 00_0A_35_01_77_3B 00_0A_35_01_77_3A 10.145.81.249
CERN 2 FPGA-BCM-ROD-03 00_0A_35_01_78_82 00_0A_35_01_78_83 10.145.81.248
FHWN FPGA-BCM-ROD-04 00_0A_35_01_9B_9A 00_0A_35_01_9B_9B 10.145.81.247
Ljubljana FPGA-BCM-ROD-05 00_0A_35_01_9B_68 00_0A_35_01_9B_69 10.145.81.246
Toronto FPGA-BCM-ROD-05 00_0A_35_01_C1_67 00_0A_35_01_C1_68 10.145.81.245
Definition at line 90 of file udp_addresses.vhd.
Member Function Documentation
| std_logic_vector cal_IP_chksum | ( a in std_logic_vector ) |
| std_logic_vector cal_UDP_chksum_base | ( a in std_logic_vector ) |
std_logic_vector conf_chksum_ovr ( ) [Function] |
std_logic_vector conf_chksum_rdy ( ) [Function] |
std_logic_vector conf_chksum_start ( ) [Function] |
std_logic_vector conf_IP ( ) [Function] |
| std_logic_vector conf_MAC | ( sel in integer ) |
| std_logic_vector conf_tdaqport | ( sel in integer ) |
| std_logic_vector reverse4byte | ( a in std_logic_vector(31 downto 0) ) |
| std_logic_vector reverse_any_vector | ( a in std_logic_vector ) |
bitwise reversal of a vector with arbitrary length
Definition at line 115 of file udp_addresses.vhd.
Member Data Documentation
arp_ann_c arp_pkt := ( htype = > x " 0001 " , ptype = > x " 0800 " , hlen = > x " 06 " , plen = > x " 04 " , operation = > x " 0001 " , sha = > src_MAC_1 , spa = > src_IP_addr , tha = > MAC_broadcast , tpa = > src_IP_addr ) [Constant] |
arptype std_logic_vector ( 15 downto 0 ) := x " 0806 " [Constant] |
build_parameters package [Package] |
cntwidth integer := 19 [Constant] |
data std_logic_vector ( 15 downto 0 ) := x " f0f0 " [Constant] |
dcs_IP_addr std_logic_vector ( 31 downto 0 ) := ip_pcatlbcmscs [Constant] |
dcs_MAC std_logic_vector ( 47 downto 0 ) := MAC_pcatlbcmscs [Constant] |
dcs_port std_logic_vector ( 15 downto 0 ) := x " FFF0 " [Constant] |
dcsdatalen integer := 212 [Constant] |
des_MAC std_logic_vector ( 47 downto 0 ) := MAC_sbcbcmtcc01 [Constant] |
dest_IP_addr std_logic_vector ( 31 downto 0 ) := ip_sbcbcmtcc01 [Constant] |
dest_port std_logic_vector ( 15 downto 0 ) := conf_tdaqport ( 0 ) [Constant] |
ethertype std_logic_vector ( 15 downto 0 ) := x " 0800 " [Constant] |
flags std_logic_vector ( 2 downto 0 ) := " 010 " [Constant] |
id std_logic_vector ( 15 downto 0 ) := x " 0000 " [Constant] |
ieee library [Library] |
IHL std_logic_vector ( 3 downto 0 ) := x " 5 " [Constant] |
ip_chksum std_logic_vector ( 15 downto 0 ) := cal_IP_chksum ( IPV4 &IHL &type_of_ser &tot_length &id &flags &offset &TTL &protocol &x " 0000 " &src_IP_addr &dest_IP_addr ) [Constant] |
ip_chksum_dcs std_logic_vector ( 15 downto 0 ) := cal_IP_chksum ( IPV4 &IHL &type_of_ser &tot_dcs_length &id &flags &offset &TTL &protocol &x " 0000 " &src_IP_addr &dcs_IP_addr ) [Constant] |
ip_chksum_tdaq std_logic_vector ( 15 downto 0 ) := cal_IP_chksum ( IPV4 &IHL &type_of_ser &tot_tdaq_length &id &flags &offset &TTL &protocol &x " 0000 " &src_IP_addr &tdaq_IP_addr ) [Constant] |
ipheadlen integer := 20 [Constant] |
ipmac package [Package] |
IPV4 std_logic_vector ( 3 downto 0 ) := x " 4 " [Constant] |
MAC_broadcast std_logic_vector ( 47 downto 0 ) := x " FF_FF_FF_FF_FF_FF " [Constant] |
main_components package [Package] |
Header with declarations of main design components.
Definition at line 41 of file udp_addresses.vhd.
offset std_logic_vector ( 12 downto 0 ) := zero_byte &zero_byte ( 4 downto 0 ) [Constant] |
ovr_chksum std_logic_vector ( 15 downto 0 ) := conf_chksum_ovr [Constant] |
pause integer := 5000 [Constant] |
pktlen integer := realdatalen +7 [Constant] |
protocol std_logic_vector ( 7 downto 0 ) := udp_protocol [Constant] |
raw_protocol std_logic_vector ( 7 downto 0 ) := x " FA " [Constant] |
rd_ovr_pat std_logic_vector ( 7 downto 0 ) := x " 01 " [Constant] |
rd_rdy_pat std_logic_vector ( 7 downto 0 ) := x " 10 " [Constant] |
rdy_chksum std_logic_vector ( 15 downto 0 ) := conf_chksum_rdy [Constant] |
realdatalen integer := 192 [Constant] |
rxdest_port std_logic_vector ( 15 downto 0 ) := x " FFFF " [Constant] |
rxdestip std_logic_vector ( 31 downto 0 ) := src_IP_addr [Constant] |
rxsrc_port std_logic_vector ( 15 downto 0 ) := x " FFFF " [Constant] |
rxsrcip std_logic_vector ( 31 downto 0 ) := dest_IP_addr [Constant] |
src_IP_addr std_logic_vector ( 31 downto 0 ) := conf_IP [Constant] |
src_port std_logic_vector ( 15 downto 0 ) := x " FFFF " [Constant] |
start_chksum std_logic_vector ( 15 downto 0 ) := conf_chksum_start [Constant] |
std_logic_1164 package [Package] |
std_logic_arith package [Package] |
arithmetic operations on std_logic datatypes, see file
Definition at line 35 of file udp_addresses.vhd.
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 37 of file udp_addresses.vhd.
std_port std_logic_vector ( 15 downto 0 ) := x " 0FF0 " [Constant] |
tdaq_IP_addr std_logic_vector ( 31 downto 0 ) := ip_sbcbcmtcc01 [Constant] |
tdaq_MAC std_logic_vector ( 47 downto 0 ) := MAC_sbcbcmtcc01 [Constant] |
tdaq_port std_logic_vector ( 15 downto 0 ) := conf_tdaqport ( 1 ) [Constant] |
tdaqdatalen integer := 141 [Constant] |
tot_dcs_length std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( dcsdatalen +udpheadlen +ipheadlen , 16 ) [Constant] |
tot_length std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( pktlen +udpheadlen +ipheadlen , 16 ) [Constant] |
length of complete IP pkt, 207 byte udp-pkt + 20 byte IP head
Definition at line 208 of file udp_addresses.vhd.
tot_tdaq_length std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( tdaqdatalen +udpheadlen +ipheadlen , 16 ) [Constant] |
TTL std_logic_vector ( 7 downto 0 ) := x " FF " [Constant] |
type_of_ser std_logic_vector ( 7 downto 0 ) := zero_byte [Constant] |
udp_chksum_base std_logic_vector ( 15 downto 0 ) := cal_UDP_chksum_base ( src_IP_addr &dest_IP_addr &zero_byte &protocol &udp_length &src_port &dest_port &udp_length &zero_byte &zero_byte ) [Constant] |
udp_chksum_base_dcs std_logic_vector ( 15 downto 0 ) := cal_UDP_chksum_base ( src_IP_addr &dcs_IP_addr &zero_byte &protocol &udp_dcs_length &src_port &dcs_port &udp_dcs_length &zero_byte &zero_byte ) [Constant] |
udp_chksum_base_tdaq std_logic_vector ( 15 downto 0 ) := cal_UDP_chksum_base ( src_IP_addr &tdaq_IP_addr &zero_byte &protocol &udp_tdaq_length &src_port &tdaq_port &udp_tdaq_length &zero_byte &zero_byte ) [Constant] |
udp_dcs_length std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( dcsdatalen +udpheadlen , 16 ) [Constant] |
udp_length std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( pktlen +udpheadlen , 16 ) [Constant] |
length of udp data msg, 199 byte body + 8 byte head
Definition at line 206 of file udp_addresses.vhd.
udp_protocol std_logic_vector ( 7 downto 0 ) := x " 11 " [Constant] |
udp_tdaq_length std_logic_vector ( 15 downto 0 ) := conv_std_logic_vector ( tdaqdatalen +udpheadlen , 16 ) [Constant] |
udpheadlen integer := 8 [Constant] |
work library [Library] |
The documentation for this class was generated from the following file:
