incrementer Entity Reference
32-bit incrementer with synchronous reset and latched output More...
Inheritance diagram for incrementer:
Collaboration diagram for incrementer:
Architectures | |
| incrementer_arc | Architecture |
| 32-bit incrementer with synchronous reset and latched output More... | |
Libraries | |
| ieee | |
| standard IEEE library | |
Packages | |
| std_logic_1164 | |
| std_logic definitions, see file | |
| numeric_std | |
| arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file | |
Ports | |
| CLK | in std_logic |
| Clock. | |
| RES | in std_logic |
| Synchronous reset. | |
| INC_1 | in std_logic |
| Increment by 1. | |
| INC_2 | in std_logic |
| Increment by 2. | |
| READ_OUT | in std_logic |
| Read current value. | |
| VALUE | out std_logic_vector ( 31 downto 0 ) |
| Latched output value. | |
Detailed Description
32-bit incrementer with synchronous reset and latched output32-bit incrementer with synchronous reset and latched output, reading the current counter value resets the counter.
Definition at line 33 of file incrementer.vhd.
Member Data Documentation
CLK in std_logic [Port] |
ieee library [Library] |
standard IEEE library
Reimplemented in main_components.
Definition at line 24 of file incrementer.vhd.
INC_1 in std_logic [Port] |
INC_2 in std_logic [Port] |
numeric_std package [Package] |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
Definition at line 28 of file incrementer.vhd.
READ_OUT in std_logic [Port] |
RES in std_logic [Port] |
std_logic_1164 package [Package] |
std_logic definitions, see file
Reimplemented in main_components.
Definition at line 26 of file incrementer.vhd.
VALUE out std_logic_vector ( 31 downto 0 ) [Port] |
The documentation for this class was generated from the following file:
