delay Entity Reference
Delay unit. More...
Inheritance diagram for delay:
Collaboration diagram for delay:
Architectures | |
| delay_arc | Architecture |
| Delay unit. More... | |
Libraries | |
| ieee | |
| standard IEEE library | |
Packages | |
| std_logic_1164 | |
| std_logic definitions, see file | |
| std_logic_arith | |
| arithmetic operations on std_logic datatypes, see file | |
| std_logic_unsigned | |
| unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
Generics | |
| i | integer range 0 to 99 := 00 |
| Delay length. | |
Ports | |
| A | in std_logic |
| Input. | |
| A_DEL | out std_logic |
| Delayed Input. | |
| CLK | in std_logic |
| Clock. | |
| RES | in std_logic |
| Reset. | |
Detailed Description
Delay unit.Definition at line 33 of file delay.vhd.
Member Data Documentation
ieee library [Library] |
std_logic_1164 package [Package] |
std_logic_arith package [Package] |
std_logic_unsigned package [Package] |
The documentation for this class was generated from the following file:
