Processes | |
delay_signal | ( CLK ) |
Counter for delay adjust. | |
Signals | |
shift | std_logic_vector ( 99 downto 0 ) := ( others = > ' 0 ' ) |
Definition at line 44 of file delay.vhd.
delay_signal | ( CLK ) |
Counter for delay adjust.
Definition at line 51 of file delay.vhd.
00051 delay_signal : process(CLK) 00052 begin 00053 if CLK'event and CLK = '1' then 00054 if RES = '1' then 00055 shift <= (others => '0'); 00056 A_DEL <= '0'; 00057 else 00058 shift <= shift(98 downto 0) & A; 00059 A_DEL <= shift(i); 00060 end if; 00061 end if; 00062 end process delay_signal;