Architectures | |
arc_pattern_compare | Architecture |
DDR2 pattern compare. More... | |
Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
std_logic_unsigned | |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
numeric_std | |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file | |
Ports | |
clk | in std_logic |
clock | |
rst | in std_logic |
reset | |
ctrl_rden | in std_logic |
read enable | |
rd_data_rise | in std_logic_vector ( 7 downto 0 ) |
rising edge data | |
rd_data_fall | in std_logic_vector ( 7 downto 0 ) |
falling edge data | |
comp_done | out std_logic |
done flag | |
first_rising | out std_logic |
start flag | |
rd_en_rise | out std_logic |
read enable rising edge data | |
rd_en_fall | out std_logic |
read enable falling edge data |
Compares the IOB output 8 bit data of one bank that is read data during the intilaization to get the delay for the data with respect to the command issued.
Definition at line 53 of file ddr2_mem_pattern_compare8.vhd.
clk in std_logic [Port] |
comp_done out std_logic [Port] |
ctrl_rden in std_logic [Port] |
first_rising out std_logic [Port] |
ieee library [Library] |
numeric_std package [Package] |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
Definition at line 47 of file ddr2_mem_pattern_compare8.vhd.
rd_data_fall in std_logic_vector ( 7 downto 0 ) [Port] |
rd_data_rise in std_logic_vector ( 7 downto 0 ) [Port] |
rd_en_fall out std_logic [Port] |
rd_en_rise out std_logic [Port] |
rst in std_logic [Port] |
std_logic_1164 package [Package] |
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 45 of file ddr2_mem_pattern_compare8.vhd.