ddr2_mem_backend_fifos_0.arc_backend_fifos Architecture Reference

DDR2 Back-End FIFOs. More...

Inheritance diagram for ddr2_mem_backend_fifos_0.arc_backend_fifos:

Collaboration diagram for ddr2_mem_backend_fifos_0.arc_backend_fifos:

Detailed Description

DDR2 Back-End FIFOs.

This module instantiates the modules containing internal FIFOs to store the data and the address.

ddr2_mem_rd_wr_addr_fifo_0 [Component]

Address FIFO.

ddr2_mem_wr_data_fifo_16 [Component]

Data FIFO.

ddr2_mem_wr_data_fifo_8 [Component]

Data FIFO.

rd_wr_addr_fifo_00 ddr2_mem_rd_wr_addr_fifo_0 [Component Instantiation]

Address FIFO.

wr_data_fifo_160 ddr2_mem_wr_data_fifo_16 [Component Instantiation]

Data FIFO.

wr_data_fifo_161 ddr2_mem_wr_data_fifo_16 [Component Instantiation]

Data FIFO.

wr_data_fifo_162 ddr2_mem_wr_data_fifo_16 [Component Instantiation]

Data FIFO.

wr_data_fifo_163 ddr2_mem_wr_data_fifo_16 [Component Instantiation]

Data FIFO.

The documentation for this class was generated from the following file:


Components
ddr2_mem_rd_wr_addr_fifo_0	<Entity ddr2_mem_rd_wr_addr_fifo_0>
	Address FIFO.
ddr2_mem_wr_data_fifo_16	<Entity ddr2_mem_wr_data_fifo_16>
	Data FIFO.
ddr2_mem_wr_data_fifo_8
	Data FIFO.
Signals
wr_df_almost_full_w	std_logic_vector ( ( fifo-1 ) downto 0 )
Component Instantiations
rd_wr_addr_fifo_00	ddr2_mem_rd_wr_addr_fifo_0 <Entity ddr2_mem_rd_wr_addr_fifo_0>
	Address FIFO.
wr_data_fifo_160	ddr2_mem_wr_data_fifo_16 <Entity ddr2_mem_wr_data_fifo_16>
	Data FIFO.
wr_data_fifo_161	ddr2_mem_wr_data_fifo_16 <Entity ddr2_mem_wr_data_fifo_16>
	Data FIFO.
wr_data_fifo_162	ddr2_mem_wr_data_fifo_16 <Entity ddr2_mem_wr_data_fifo_16>
	Data FIFO.
wr_data_fifo_163	ddr2_mem_wr_data_fifo_16 <Entity ddr2_mem_wr_data_fifo_16>
	Data FIFO.