ddr2_mem_backend_fifos_0 Entity Reference

DDR2 Back-End FIFOs. More...

Inheritance diagram for ddr2_mem_backend_fifos_0:

Collaboration diagram for ddr2_mem_backend_fifos_0:

List of all members.

Architectures

arc_backend_fifos Architecture

DDR2 Back-End FIFOs. More...

Libraries

ieee

standard IEEE library

work

unisim

Packages

std_logic_1164

std_logic definitions, see file

std_logic_unsigned

unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file

numeric_std

arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file

ddr2_mem_parameters_0 Package <ddr2_mem_parameters_0>

vcomponents

Ports

clk0 in std_logic

clk90 in std_logic

rst in std_logic

app_af_addr in std_logic_vector ( 35 downto 0 )

app_af_WrEn in std_logic

ctrl_af_RdEn in std_logic

af_addr out std_logic_vector ( 35 downto 0 )

af_Empty out std_logic

af_Almost_Full out std_logic

app_Wdf_data in std_logic_vector ( dq_width *2-1 downto 0 )

app_mask_data in std_logic_vector ( dm_width *2-1 downto 0 )

app_Wdf_WrEn in std_logic

ctrl_Wdf_RdEn in std_logic

Wdf_data out std_logic_vector ( dq_width *2-1 downto 0 )

mask_data out std_logic_vector ( dm_width *2-1 downto 0 )

Wdf_Almost_Full out std_logic

Detailed Description

DDR2 Back-End FIFOs.

This module instantiates the modules containing internal FIFOs to store the data and the address.

ieee library [Library]

standard IEEE library

numeric_std package [Package]

arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file

std_logic_1164 package [Package]

std_logic definitions, see file

std_logic_unsigned package [Package]

unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file

The documentation for this class was generated from the following file:


Architectures
arc_backend_fifos	Architecture
	DDR2 Back-End FIFOs. More...
Libraries
ieee
	standard IEEE library
work
unisim
Packages
std_logic_1164
	std_logic definitions, see file
std_logic_unsigned
	unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
numeric_std
	arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
ddr2_mem_parameters_0	Package <ddr2_mem_parameters_0>
vcomponents
Ports
clk0	in std_logic
clk90	in std_logic
rst	in std_logic
app_af_addr	in std_logic_vector ( 35 downto 0 )
app_af_WrEn	in std_logic
ctrl_af_RdEn	in std_logic
af_addr	out std_logic_vector ( 35 downto 0 )
af_Empty	out std_logic
af_Almost_Full	out std_logic
app_Wdf_data	in *std_logic_vector ( dq_width 2-1 downto 0 )**
app_mask_data	in *std_logic_vector ( dm_width 2-1 downto 0 )**
app_Wdf_WrEn	in std_logic
ctrl_Wdf_RdEn	in std_logic
Wdf_data	out *std_logic_vector ( dq_width 2-1 downto 0 )**
mask_data	out *std_logic_vector ( dm_width 2-1 downto 0 )**
Wdf_Almost_Full	out std_logic