Architectures | |
cnt_ddr2_rd_arc | Architecture |
Counter for accesses to DDR2. More... | |
Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
std_logic_arith | |
arithmetic operations on std_logic datatypes, see file | |
std_logic_unsigned | |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
numeric_std | |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file | |
Ports | |
RESET | in std_logic |
Reset. | |
CLK | in std_logic |
Clock. | |
EN | in std_logic |
Enable. | |
DONE | out std_logic |
Overflow flag. | |
Attributes | |
use_dsp48 | string |
XST specific attribute. | |
use_dsp48 | " yes " |
force XST to infer DSP48 cores |
Definition at line 35 of file cnt_ddr2_rd.vhd.
CLK in std_logic [Port] |
DONE out std_logic [Port] |
EN in std_logic [Port] |
ieee library [Library] |
standard IEEE library
Reimplemented in main_components.
Definition at line 24 of file cnt_ddr2_rd.vhd.
numeric_std package [Package] |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
Definition at line 32 of file cnt_ddr2_rd.vhd.
RESET in std_logic [Port] |
std_logic_1164 package [Package] |
std_logic definitions, see file
Reimplemented in main_components.
Definition at line 26 of file cnt_ddr2_rd.vhd.
std_logic_arith package [Package] |
arithmetic operations on std_logic datatypes, see file
Definition at line 28 of file cnt_ddr2_rd.vhd.
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 30 of file cnt_ddr2_rd.vhd.
use_dsp48 " yes " [Attribute] |
use_dsp48 string [Attribute] |