generic_shift_reg.generic_shift_reg_arc Architecture Reference

Generic shift register. Width and depth adjustable at compile-time. More...

Inheritance diagram for generic_shift_reg.generic_shift_reg_arc:

Collaboration diagram for generic_shift_reg.generic_shift_reg_arc:

List of all members.

Processes

shift_reg ( CLK , RES )

Types

reg_arr array ( WIDTH-1 downto 0 ) of std_logic_vector ( DEPTH -1 downto 0 )

2D array of std_logic

Signals

sreg reg_arr := ( others = > ( others = > ' 0 ' ) )

tmp std_logic_vector ( DEPTH -1 downto 0 ) := ( others = > ' 0 ' )

Detailed Description

Generic shift register. Width and depth adjustable at compile-time.

Definition at line 48 of file generic_shift_reg.vhd.

Member Data Documentation

reg_arr array ( WIDTH-1 downto 0 ) of std_logic_vector ( DEPTH -1 downto 0 ) [Type]

2D array of std_logic

Definition at line 51 of file generic_shift_reg.vhd.

The documentation for this class was generated from the following file:

generic_shift_reg.vhd


Processes
shift_reg	( CLK , RES )
Types
reg_arr	array ( WIDTH-1 downto 0 ) of std_logic_vector ( DEPTH -1 downto 0 )
	2D array of std_logic
Signals
sreg	reg_arr := ( others = > ( others = > ' 0 ' ) )
tmp	std_logic_vector ( DEPTH -1 downto 0 ) := ( others = > ' 0 ' )