ddr2_mem_controller_iobs_0.arc_controller_iobs Architecture Reference
Control signal IOBs. More...
Inheritance diagram for ddr2_mem_controller_iobs_0.arc_controller_iobs:
Collaboration diagram for ddr2_mem_controller_iobs_0.arc_controller_iobs:
Components | |
| OBUF | |
| Output Buffer. | |
Component Instantiations | |
| OBUF_ras | OBUF |
| Output Buffer. | |
| OBUF_cas | OBUF |
| Output Buffer. | |
| OBUF_we | OBUF |
| Output Buffer. | |
| OBUF_cs0 | OBUF |
| Output Buffer. | |
| OBUF_cke0 | OBUF |
| Output Buffer. | |
| OBUF_odt0 | OBUF |
| Output Buffer. | |
| OBUF_r0 | OBUF |
| Output Buffer. | |
| OBUF_r1 | OBUF |
| Output Buffer. | |
| OBUF_r2 | OBUF |
| Output Buffer. | |
| OBUF_r3 | OBUF |
| Output Buffer. | |
| OBUF_r4 | OBUF |
| Output Buffer. | |
| OBUF_r5 | OBUF |
| Output Buffer. | |
| OBUF_r6 | OBUF |
| Output Buffer. | |
| OBUF_r7 | OBUF |
| Output Buffer. | |
| OBUF_r8 | OBUF |
| Output Buffer. | |
| OBUF_r9 | OBUF |
| Output Buffer. | |
| OBUF_r10 | OBUF |
| Output Buffer. | |
| OBUF_r11 | OBUF |
| Output Buffer. | |
| OBUF_r12 | OBUF |
| Output Buffer. | |
| OBUF_r13 | OBUF |
| Output Buffer. | |
| OBUF_b0 | OBUF |
| Output Buffer. | |
| OBUF_b1 | OBUF |
| Output Buffer. | |
Detailed Description
Control signal IOBs.This module puts the memory control signals like address, bank address, row address strobe, column address strobe, write enable and clock enable in the IOBs.
Definition at line 88 of file ddr2_mem_controller_iobs_0.vhd.
Member Data Documentation
OBUF [Component] |
The documentation for this class was generated from the following file:
