Components | |
comparator_v9_0 | <Entity comparator_v9_0> |
Greater-than Comparator Core. | |
Signals | |
a_i | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
b_i | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
c_i | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
d_i | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
ab | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
cd | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
ab_i | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
cd_i | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
final | std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' ) |
res_ab | std_logic := ' 0 ' |
res_cd | std_logic := ' 0 ' |
res_end | std_logic := ' 0 ' |
or_stat | std_logic := ' 0 ' |
Component Instantiations | |
comp_1 | comparator_v9_0 <Entity comparator_v9_0> |
comp_2 | comparator_v9_0 <Entity comparator_v9_0> |
comp_3 | comparator_v9_0 <Entity comparator_v9_0> |
Pipelined comparator module to determine the greatest value of four 6-bit input values with an additional enable bit per input.
Definition at line 59 of file comparator4.vhd.
comparator_v9_0 [Component] |