Processes | |
PROCESS_31 | ( CLOCK_IN ) |
fsm_read_from_pc | ( CLOCK_IN ) |
Constants | |
address_triggers | std_logic_vector ( 2 downto 0 ) := " 000 " |
address_delays | std_logic_vector ( 2 downto 0 ) := " 001 " |
address_parameters_I | std_logic_vector ( 2 downto 0 ) := " 010 " |
address_run_number | std_logic_vector ( 2 downto 0 ) := " 011 " |
address_source_id | std_logic_vector ( 2 downto 0 ) := " 100 " |
address_reserved | std_logic_vector ( 2 downto 0 ) := " 101 " |
address_parameters_III | std_logic_vector ( 2 downto 0 ) := " 110 " |
address_coarse_delay | std_logic_vector ( 2 downto 0 ) := " 111 " |
Signals | |
cnt_i | integer range 0 to 31 := 0 |
module_selected_i | std_logic := ' 0 ' |
Data_valid_i | std_logic := ' 0 ' |
expert | std_logic := ' 0 ' |
inhibit_n | std_logic := ' 0 ' |
triggers_i | std_logic_vector ( 50 downto 0 ) := ( others = > ' 0 ' ) |
Data_i | std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' ) |
Addr_i | std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' ) |
This architecture decodes commands from the PC according to the communication menu defined at twiki menu
Further information can be found in the following document
Definition at line 156 of file command_decoder.vhd.