command_decoder.command_decoder_arc Architecture Reference

decoder for commands from PC More...

Inheritance diagram for command_decoder.command_decoder_arc:

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Collaboration diagram for command_decoder.command_decoder_arc:

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List of all members.


Processes

PROCESS_31  ( CLOCK_IN )
fsm_read_from_pc  ( CLOCK_IN )

Constants

address_triggers  std_logic_vector ( 2 downto 0 ) := " 000 "
address_delays  std_logic_vector ( 2 downto 0 ) := " 001 "
address_parameters_I  std_logic_vector ( 2 downto 0 ) := " 010 "
address_run_number  std_logic_vector ( 2 downto 0 ) := " 011 "
address_source_id  std_logic_vector ( 2 downto 0 ) := " 100 "
address_reserved  std_logic_vector ( 2 downto 0 ) := " 101 "
address_parameters_III  std_logic_vector ( 2 downto 0 ) := " 110 "
address_coarse_delay  std_logic_vector ( 2 downto 0 ) := " 111 "

Signals

cnt_i  integer range 0 to 31 := 0
module_selected_i  std_logic := ' 0 '
Data_valid_i  std_logic := ' 0 '
expert  std_logic := ' 0 '
inhibit_n  std_logic := ' 0 '
triggers_i  std_logic_vector ( 50 downto 0 ) := ( others = > ' 0 ' )
Data_i  std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
Addr_i  std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )


Detailed Description

decoder for commands from PC

This architecture decodes commands from the PC according to the communication menu defined at twiki menu
Further information can be found in the following document

Definition at line 156 of file command_decoder.vhd.


The documentation for this class was generated from the following file:

Author: M.Niegl
Generated on Tue Nov 4 00:49:20 2008 for BCM-AAA by doxygen 1.5.7.1-20081012