Processes | |
PROCESS_193 | ( clock ) |
data generation | |
Signals | |
LFSR | std_logic_vector ( 13 downto 0 ) := ( others = > ' 0 ' ) |
LFSR as pseudo-random data generator
Definition at line 44 of file LFSR14_23A3.vhd.
PROCESS_193 | ( clock ) |
data generation
Definition at line 49 of file LFSR14_23A3.vhd.
00049 process(clock) 00050 begin 00051 if clock'event and clock = '1' then 00052 if en = '1' then 00053 LFSR(0) <= LFSR(0) xor LFSR(1) xor LFSR(5) xor LFSR(7) xor LFSR(8) xor LFSR(9) xor LFSR(13) xor not(LFSR(0) or LFSR(1) or LFSR(2) or LFSR(3) or LFSR(4) or LFSR(5) or LFSR(6) or LFSR(7) or LFSR(8) or LFSR(9) or LFSR(10) or LFSR(11) or LFSR(12)); 00054 LFSR(13 downto 1) <= LFSR(12 downto 0); 00055 end if; 00056 end if; 00057 end process;