Architectures | |
RTL | Architecture |
Linear feedback shift register (LFSR). More... | |
Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
std_logic_arith | |
arithmetic operations on std_logic datatypes, see file | |
std_logic_unsigned | |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
Ports | |
clock | in std_logic |
Clock. | |
en | in std_logic |
Enable. | |
q | out std_logic_vector ( 13 downto 0 ) |
Data out. |
LFSR as pseudo-random data generator
Definition at line 34 of file LFSR14_23A3.vhd.
clock in std_logic [Port] |
en in std_logic [Port] |
ieee library [Library] |
q out std_logic_vector ( 13 downto 0 ) [Port] |
std_logic_1164 package [Package] |
std_logic_arith package [Package] |
arithmetic operations on std_logic datatypes, see file
Definition at line 28 of file LFSR14_23A3.vhd.
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 30 of file LFSR14_23A3.vhd.