ltp_comm.vhd

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--**************************************************************
--*                                                            *
--*     The source code for the ATLAS BCM "AAA" FPGA is made   *
--*     available via the GNU General Public License (GPL)     *
--*     unless otherwise stated below.                         *
--*                                                            *
--*     In case of problems/questions/bug reports etc. please  *
--*     contact michael.niegl@cern.ch                          *
--*                                                            *
--**************************************************************

--**************************************************************
--*                                                            *
--*  $Source: /local/reps/bcmfpga/bcm_aaa/bcm_aaa/div/ltp_comm.vhd,v $
--*  $Revision: 1.11.2.3 $                                          *
--*  $Name: dev $                                                 *
--*  $Author: mniegl $                                         *
--*  $Date: 2008/11/03 17:57:45 $                              *


--*                                                            *
--**************************************************************


library ieee;

use ieee.std_logic_1164.all;




entity ltp_comm is
  
  port (
    BCLK          : in  std_logic;
    RESET         : in  std_logic;
    ORBIT         : in  std_logic;
    BCR           : in  std_logic;
    START_RUN     : in  std_logic;
    L1A           : in  std_logic;
    ECR           : in  std_logic;
    ECR_LOAD_EN   : in  std_logic;
    ECR_LOAD      : in  std_logic_vector(7 downto 0);
    L1A_LOAD_EN   : in  std_logic;
    L1A_LOAD      : in  std_logic_vector(23 downto 0);
    ORBIT_LOAD_EN : in  std_logic;
    ORBIT_LOAD    : in  std_logic_vector(31 downto 0);
    EXT_EVID      : out std_logic_vector(31 downto 0);
    BCID          : out std_logic_vector(11 downto 0);
    ORBITID       : out std_logic_vector(31 downto 0)
    );

end ltp_comm;




architecture ltp_comm_arc of ltp_comm is

  signal bcid_reset : std_logic := '0';


  component ORBIT_cnt
    port (
      RESET         : in  std_logic;
      CLK           : in  std_logic;
      ORBIT         : in  std_logic;
      ORBIT_LOAD_EN : in  std_logic;
      ORBIT_LOAD    : in  std_logic_vector(31 downto 0);
      START_RUN     : in  std_logic;
      CNT_ORBIT     : out std_logic_vector(31 downto 0));
  end component;


  component EVENT_cnt
    port (
      CLK          : in  std_logic;
      RESET        : in  std_logic;
      L1A          : in  std_logic;
      ECR          : in  std_logic;
      ECR_LOAD_EN  : in  std_logic;
      ECR_LOAD     : in  std_logic_vector(7 downto 0);
      L1A_LOAD_EN  : in  std_logic;
      L1A_LOAD     : in  std_logic_vector(23 downto 0);
      START_RUN    : in  std_logic;
      EXT_EVENT_ID : out std_logic_vector(31 downto 0));
  end component;


  component BID_cnt
    port (
      BC     : in  std_logic;
      BCR    : in  std_logic;
      RESET  : in  std_logic;
      BID    : out std_logic_vector(11 downto 0));
  end component;

begin  -- ltp_comm_arc


  turn_counter : ORBIT_cnt
    port map (
      RESET         => RESET,
      CLK           => BCLK,
      ORBIT_LOAD_EN => ORBIT_LOAD_EN,
      ORBIT_LOAD    => ORBIT_LOAD,
      ORBIT         => ORBIT,
      START_RUN     => START_RUN,
      CNT_ORBIT     => ORBITID);

  bcid_reset <= ORBIT or BCR;


  bunch_counter : BID_cnt
    port map (
      BC      => BCLK,
      BCR     => bcid_reset ,
      RESET   => RESET,
      BID     => BCID);


  event_counter : EVENT_cnt
    port map (
      CLK           => BCLK,
      RESET        => RESET,
      L1A           => L1A,
      ECR           => ECR,
      L1A_LOAD_EN  => L1A_LOAD_EN,
      L1A_LOAD     => L1A_LOAD,
      ECR_LOAD_EN  => ECR_LOAD_EN,
      ECR_LOAD     => ECR_LOAD,
      START_RUN    => START_RUN,
      EXT_EVENT_ID => EXT_EVID);

end ltp_comm_arc;

---

Author: M.Niegl

Generated on Tue Nov 4 00:47:04 2008 for BCM-AAA by  1.5.7.1-20081012