Architectures | |
onescomplementadder_arc | Architecture |
Carry Look-Ahead Full-Adder. More... | |
Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
std_logic_arith | |
arithmetic operations on std_logic datatypes, see file | |
std_logic_unsigned | |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
Ports | |
CLK | in std_logic |
Clock. | |
RESET | in std_logic |
Reset. | |
EN | in std_logic |
Enable. | |
A | in std_logic_vector ( 15 downto 0 ) |
Input1. | |
B | in std_logic_vector ( 15 downto 0 ) |
Input2. | |
C_IN | in std_logic |
Carry In. | |
C_OUT | out std_logic |
Carry Out. | |
Y | out std_logic_vector ( 15 downto 0 ) |
Result Out. |
Definition at line 39 of file onescomplementadder.vhd.
A in std_logic_vector ( 15 downto 0 ) [Port] |
B in std_logic_vector ( 15 downto 0 ) [Port] |
C_IN in std_logic [Port] |
C_OUT out std_logic [Port] |
CLK in std_logic [Port] |
EN in std_logic [Port] |
ieee library [Library] |
RESET in std_logic [Port] |
std_logic_1164 package [Package] |
std_logic_arith package [Package] |
arithmetic operations on std_logic datatypes, see file
Definition at line 34 of file onescomplementadder.vhd.
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 36 of file onescomplementadder.vhd.
Y out std_logic_vector ( 15 downto 0 ) [Port] |