division Entity Reference
Division by constant power of two. More...
Inheritance diagram for division:
Collaboration diagram for division:
Architectures | |
| division_arc | Architecture |
| Division by constant power of two. More... | |
Libraries | |
| ieee | |
| standard IEEE library | |
Packages | |
| std_logic_1164 | |
| std_logic definitions, see file | |
| numeric_std | |
| arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file | |
Generics | |
| DIVISOR | integer := 4096 |
Ports | |
| CLK | in std_logic |
| Clock. | |
| RES | in std_logic |
| Reset. | |
| A | in unsigned ( 15 downto 0 ) |
| Dividend. | |
| C | out unsigned ( 15 downto 0 ) |
| Quotient. | |
Detailed Description
Division by constant power of two.This entity divides an unsigned input of 14 bits by a constant that needs to be a power of two (otherwise XST can't infer a division by arithmetic shift)
Definition at line 34 of file division.vhd.
Member Data Documentation
A in unsigned ( 15 downto 0 ) [Port] |
C out unsigned ( 15 downto 0 ) [Port] |
CLK in std_logic [Port] |
ieee library [Library] |
numeric_std package [Package] |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
Definition at line 28 of file division.vhd.
RES in std_logic [Port] |
std_logic_1164 package [Package] |
The documentation for this class was generated from the following file:
