addr_a (defined in ddr2_data_buffer.ddr2_data_buffer_arc) | ddr2_data_buffer.ddr2_data_buffer_arc | [Signal] |
addr_b (defined in ddr2_data_buffer.ddr2_data_buffer_arc) | ddr2_data_buffer.ddr2_data_buffer_arc | [Signal] |
CLKA | ddr2_data_buffer | [Port] |
CLKB | ddr2_data_buffer | [Port] |
DATA_IN | ddr2_data_buffer | [Port] |
DATA_OUT | ddr2_data_buffer | [Port] |
EMPTY | ddr2_data_buffer | [Port] |
ieee | ddr2_data_buffer | [Library] |
numeric_std | ddr2_data_buffer | [Package] |
raw_buffer | ddr2_data_buffer.ddr2_data_buffer_arc | [Component] |
raw_data_buffer | ddr2_data_buffer.ddr2_data_buffer_arc | [Component Instantiation] |
rd_addr_gen(CLKA) | ddr2_data_buffer.ddr2_data_buffer_arc | [Process] |
REN | ddr2_data_buffer | [Port] |
RESET | ddr2_data_buffer | [Port] |
std_logic_1164 | ddr2_data_buffer | [Package] |
std_logic_arith | ddr2_data_buffer | [Package] |
std_logic_unsigned | ddr2_data_buffer | [Package] |
unisim | ddr2_data_buffer | [Library] |
vcomponents | ddr2_data_buffer | [Package] |
WEN | ddr2_data_buffer | [Port] |
wr_addr_gen(CLKB) | ddr2_data_buffer.ddr2_data_buffer_arc | [Process] |