CLK_IN | clock_divider | [Port] |
CLK_OUT | clock_divider | [Port] |
clock_out_i (defined in clock_divider.clock_divider_arc) | clock_divider.clock_divider_arc | [Signal] |
counter_i (defined in clock_divider.clock_divider_arc) | clock_divider.clock_divider_arc | [Signal] |
DIVISION_FACTOR | clock_divider | [Generic] |
ieee | clock_divider | [Library] |
INITIAL_VALUE | clock_divider | [Generic] |
PROCESS_30(CLK_IN) | clock_divider.clock_divider_arc | [Process] |
std_logic_1164 | clock_divider | [Package] |
std_logic_arith | clock_divider | [Package] |
std_logic_unsigned | clock_divider | [Package] |