buffer_3ST Entity Reference

Tri-State Buffer. More...

Inheritance diagram for buffer_3ST:

[legend]

Collaboration diagram for buffer_3ST:

[legend]

List of all members.

Architectures
buffer_3ST_arc	Architecture
	Tri-State Buffer. More...
Libraries
ieee
	standard IEEE library
Packages
std_logic_1164
	std_logic definitions, see file
Ports
D_IN	in std_logic_vector ( 7 downto 0 )
	Input.
D_OUT	out std_logic_vector ( 7 downto 0 )
	Output.
ENABLE	in std_logic
	Enable.

---

Detailed Description

Tri-State Buffer.

If ENABLE = '1', output matches input, else output is set to high impedance

Definition at line 31 of file buffer_3ST.vhd.

---

Member Data Documentation

D_IN in std_logic_vector ( 7 downto 0 ) [Port]

Input.

Definition at line 32 of file buffer_3ST.vhd.

D_OUT out std_logic_vector ( 7 downto 0 ) [Port]

Output.

Definition at line 33 of file buffer_3ST.vhd.

ENABLE in std_logic [Port]

Enable.

Definition at line 34 of file buffer_3ST.vhd.

ieee library [Library]

standard IEEE library

Definition at line 24 of file buffer_3ST.vhd.

std_logic_1164 package [Package]

std_logic definitions, see file

Definition at line 26 of file buffer_3ST.vhd.

---

The documentation for this class was generated from the following file:

• buffer_3ST.vhd