abort_controller.abort_controller_arc Architecture Reference

Beam abort logic. More...

Inheritance diagram for abort_controller.abort_controller_arc:

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Collaboration diagram for abort_controller.abort_controller_arc:

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List of all members.

Processes
fire	( CLK , RES )
	purpose: immediate abort
addr_gen_a	( CLK )
	addressing of write half with bcid
low_cnt	( CLK , RESET )
	count low gain hits
high_cnt	( CLK , RESET )
	count high gain hits
rlow_cnt	( CLK , RESET )
	count remote low gain hits
rhigh_cnt	( CLK , RESET )
	count remote high gain hits
comp_mid	( CLK , RESET )
	compare middle
comp_blw	( CLK , RESET )
	compare below
comp_abv	( CLK , RESET )
	compare above
Components
abort_buffer	<Entity abort_buffer>
	buffer to store results
Signals
fire_abort	std_logic := ' 0 '
we	std_logic := ' 0 '
compare1	std_logic := ' 0 '
compare2	std_logic := ' 0 '
compare	std_logic := ' 0 '
abort_middle	std_logic := ' 0 '
abort_above	std_logic := ' 0 '
abort_below	std_logic := ' 0 '
rdvld	std_logic := ' 0 '
rden	std_logic := ' 0 '
bcid_i	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
cnt_a	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
cnt_b	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
rdbid	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
data_i	std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' )
data_out_i	std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' )
low_hits	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
high_hits	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rlow_hits	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rhigh_hits	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rlow_hits2	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rhigh_hits2	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rlow_hits3	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
rhigh_hits3	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
read_low_hits	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
read_high_hits	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
read_low_hits2	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
read_high_hits2	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
read_low_hits3	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
read_high_hits3	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
mid_high_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
mid_low_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
blw_high_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
blw_low_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
abv_high_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
abv_low_cnt	std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
Component Instantiations
buf_i	abort_buffer <Entity abort_buffer>
	Circular Buffer, DP-RAM as a BRAM Core.
Aliases
RESET	RES

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Detailed Description

Beam abort logic.

Beam abort logic controller

Definition at line 53 of file abort_controller.vhd.

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Member Function Documentation

[Process]

addr_gen_a

( CLK )

addressing of write half with bcid

Definition at line 155 of file abort_controller.vhd.

  addr_gen_a : process(CLK)
  begin
    if CLK'event and CLK = '1' then
      if RES = '1' then
        cnt_a  <= (others => '0');
        data_i <= (others => '0');
        bcid_i <= (others => '0');
      else
        if WR_EN = '1' then
          bcid_i <= BCID;
          cnt_a  <= bcid_i;
          data_i <= high_hits & low_hits;
        end if;
      end if;
    end if;
  end process addr_gen_a;

[Process]

comp_abv		( CLK ,
		RESET )

compare above

Definition at line 288 of file abort_controller.vhd.

  comp_abv : process (CLK, RESET)
  begin  -- process comp_abv
    if RESET = '1' then                 -- asynchronous reset (active high)
      abort_above <= '0';
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      if compare = '1' then
        abv_high_cnt <= conv_std_logic_vector(conv_integer(rhigh_hits3) + conv_integer(read_high_hits3), 5);
        abv_low_cnt  <= conv_std_logic_vector(conv_integer(rlow_hits3) + conv_integer(read_low_hits3), 5);
      else
        abv_high_cnt <= (others => '0');
        abv_low_cnt  <= (others => '0');
      end if;
      if abv_low_cnt >= 3 and abv_high_cnt >= 4 then
        abort_above <= '1';
      else
        abort_above <= '0';
      end if;
    end if;
  end process comp_abv;

[Process]

comp_blw		( CLK ,
		RESET )

compare below

Definition at line 267 of file abort_controller.vhd.

  comp_blw : process (CLK, RESET)
  begin  -- process comp_blw
    if RESET = '1' then                 -- asynchronous reset (active high)
      abort_below <= '0';
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      if compare2 = '1' then
        blw_high_cnt <= conv_std_logic_vector(conv_integer(rhigh_hits2) + conv_integer(read_high_hits2), 5);
        blw_low_cnt  <= conv_std_logic_vector(conv_integer(rlow_hits2) + conv_integer(read_low_hits2), 5);
      else
        blw_high_cnt <= (others => '0');
        blw_low_cnt  <= (others => '0');
      end if;
      if blw_low_cnt >= 3 and blw_high_cnt >= 4 then
        abort_below <= '1';
      else
        abort_below <= '0';
      end if;
    end if;
  end process comp_blw;

[Process]

comp_mid		( CLK ,
		RESET )

compare middle

Definition at line 243 of file abort_controller.vhd.

  comp_mid : process (CLK, RESET)
  begin  -- process comp_mid
    if RESET = '1' then                 -- asynchronous reset (active high)
      abort_middle <= '0';
      mid_high_cnt <= (others => '0');
      mid_low_cnt  <= (others => '0');
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      abort_middle <= '0';
      if compare1 = '1' then
        mid_high_cnt <= conv_std_logic_vector(conv_integer(rhigh_hits) + conv_integer(read_high_hits), 5);
        mid_low_cnt  <= conv_std_logic_vector(conv_integer(rlow_hits) + conv_integer(read_low_hits), 5);
      else
        mid_high_cnt <= (others => '0');
        mid_low_cnt  <= (others => '0');
      end if;
      if mid_low_cnt >= 3 and mid_high_cnt >= 4 then
        abort_middle <= '1';
      else
        abort_middle <= '0';
      end if;
    end if;
  end process comp_mid;

[Process]

fire		( CLK ,
		RES )

purpose: immediate abort

Definition at line 113 of file abort_controller.vhd.

  fire : process (CLK, RES)
    variable lowcnt : std_logic_vector(2 downto 0) := "000";
  begin  -- process fire
    if RES = '1' then                   -- asynchronous reset (active high)
      fire_abort <= '0';
      lowcnt     := "000";
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      fire_abort <= '0';
      lowcnt     := "000";
      if (HIGH_GAIN(0) and HIGH_GAIN(1) and HIGH_GAIN(2) and HIGH_GAIN(3)) = '1' then
        lowcnt := conv_std_logic_vector(conv_integer(LOW_GAIN(0)) + conv_integer(LOW_GAIN(1)) + conv_integer(LOW_GAIN(2)) + conv_integer(LOW_GAIN(3)), 3);
        if lowcnt >= 3 then
          fire_abort <= '1';
        else
          lowcnt     := "000";
          fire_abort <= '0';
        end if;
      else
        lowcnt     := "000";
        fire_abort <= '0';
      end if;
    end if;
  end process fire;

[Process]

high_cnt		( CLK ,
		RESET )

count high gain hits

Definition at line 185 of file abort_controller.vhd.

  high_cnt : process (CLK, RESET)
  begin  -- process high_cnt
    if RESET = '1' then                 -- asynchronous reset (active high)
      high_hits <= "000";
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      if WR_EN = '1' then
        high_hits <= conv_std_logic_vector(conv_integer(HIGH_GAIN(0)) + conv_integer(HIGH_GAIN(1)) + conv_integer(HIGH_GAIN(2)) + conv_integer(HIGH_GAIN(3)), 3);
      end if;
    end if;
  end process high_cnt;

[Process]

low_cnt		( CLK ,
		RESET )

count low gain hits

Definition at line 173 of file abort_controller.vhd.

  low_cnt : process (CLK, RESET)
  begin  -- process low_cnt
    if RESET = '1' then                 -- asynchronous reset (active high)
      low_hits <= "000";
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      if WR_EN = '1' then
        low_hits <= conv_std_logic_vector(conv_integer(LOW_GAIN(0)) + conv_integer(LOW_GAIN(1)) + conv_integer(LOW_GAIN(2)) + conv_integer(LOW_GAIN(3)), 3);
      end if;
    end if;
  end process low_cnt;

[Process]

rhigh_cnt		( CLK ,
		RESET )

count remote high gain hits

Definition at line 209 of file abort_controller.vhd.

  rhigh_cnt : process (CLK, RESET)
  begin  -- process rhigh_cnt
    if RESET = '1' then                 -- asynchronous reset (active high)
      rhigh_hits <= (others => '0');
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      if CHECK_EN = '1' then
        rhigh_hits <= conv_std_logic_vector(conv_integer(HIGH_GAIN_R(0)) + conv_integer(HIGH_GAIN_R(1)) + conv_integer(HIGH_GAIN_R(2)) + conv_integer(HIGH_GAIN_R(3)), 3);
      end if;
    end if;
  end process rhigh_cnt;

[Process]

rlow_cnt		( CLK ,
		RESET )

count remote low gain hits

Definition at line 197 of file abort_controller.vhd.

  rlow_cnt : process (CLK, RESET)
  begin  -- process rlow_cnt
    if RESET = '1' then                 -- asynchronous reset (active high)
      rlow_hits <= (others => '0');
    elsif CLK'event and CLK = '1' then  -- rising clock edge
      if CHECK_EN = '1' then
        rlow_hits <= conv_std_logic_vector(conv_integer(LOW_GAIN_R(0)) + conv_integer(LOW_GAIN_R(1)) + conv_integer(LOW_GAIN_R(2)) + conv_integer(LOW_GAIN_R(3)), 3);
      end if;
    end if;
  end process rlow_cnt;

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Member Data Documentation

abort_buffer [Component]

buffer to store results

Definition at line 95 of file abort_controller.vhd.

buf_i abort_buffer [Component Instantiation]

Circular Buffer, DP-RAM as a BRAM Core.

Definition at line 140 of file abort_controller.vhd.

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The documentation for this class was generated from the following file:

• abort_controller.vhd