ROCKETIO_SATA Entity Reference
SATA RocketIO wrapper. More...
Inheritance diagram for ROCKETIO_SATA:
Collaboration diagram for ROCKETIO_SATA:
Architectures | |
| ROCKETIO_SATA_arc | Architecture |
| RocketIO primitive instantiation. More... | |
Libraries | |
| ieee | |
| standard IEEE library | |
| unisim | |
| Library with Xilinx primitives. | |
Packages | |
| std_logic_1164 | |
| std_logic definitions, see file | |
| numeric_std | |
| arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file | |
| vcomponents | |
| Header with Xilinx primitives. | |
Generics | |
| SIMULATION_P | integer := 0 |
| Set to 1 when using module in simulation. | |
| TX_FD_MIN_P | std_logic_vector ( 10 downto 0 ) := " 00001001101 " |
| Floor (128*Ttxoutclk1/Tdclk) - 3. | |
| TX_FD_EN_P | std_logic := ' 1 ' |
| 1 = enable calblock TX frequency test | |
| RX_FD_MIN_P | std_logic_vector ( 10 downto 0 ) := " 00001001101 " |
| Floor (128*Trxrecclk1/Tdclk) - 3. | |
| RX_FD_EN_P | std_logic := ' 1 ' |
| 1 = enable calblock RX frequency test | |
| TX_FD_WIDTH_P | integer := 11 |
| TX Fdetect MIN value width. | |
| RX_FD_WIDTH_P | integer := 11 |
| RX Fdetect MIN value width. | |
| MGT0_GT11_MODE_P | string := " b " |
| Default Location. | |
| MGT0_MGT_ID_P | integer := 1 |
| 0=A, 1=B | |
| MGT1_GT11_MODE_P | string := " a " |
| Default Location. | |
| MGT1_MGT_ID_P | integer := 0 |
| 0=A, 1=B | |
Ports | |
| RXCOMMADETUSE0_IN | in std_logic |
| RXCOMMADETUSE1_IN | in std_logic |
| MGT_TXCRCCLK_IN | in std_logic |
| MGT0_TXCRCDATAVALID_IN | in std_logic |
| MGT1_TXCRCDATAVALID_IN | in std_logic |
| MGT0_TXCRCINIT_IN | in std_logic |
| MGT1_TXCRCINIT_IN | in std_logic |
| MGT_TXCRCINTCLK_IN | in std_logic |
| MGT0_TXCRCOUT_OUT | out std_logic_vector ( 31 downto 0 ) |
| MGT1_TXCRCOUT_OUT | out std_logic_vector ( 31 downto 0 ) |
| MGT0_TXCRCRESET_IN | in std_logic |
| MGT1_TXCRCRESET_IN | in std_logic |
| MGT_RXCRCCLK_IN | in std_logic |
| MGT0_RXCRCDATAVALID_IN | in std_logic |
| MGT1_RXCRCDATAVALID_IN | in std_logic |
| MGT0_RXCRCIN_IN | in std_logic_vector ( 31 downto 0 ) |
| MGT1_RXCRCIN_IN | in std_logic_vector ( 31 downto 0 ) |
| MGT0_RXCRCINIT_IN | in std_logic |
| MGT1_RXCRCINIT_IN | in std_logic |
| MGT_RXCRCINTCLK_IN | in std_logic |
| MGT0_RXCRCOUT_OUT | out std_logic_vector ( 31 downto 0 ) |
| MGT1_RXCRCOUT_OUT | out std_logic_vector ( 31 downto 0 ) |
| MGT0_RXCRCRESET_IN | in std_logic |
| MGT1_RXCRCRESET_IN | in std_logic |
| MGT0_RXCHARISCOMMA_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_RXCHARISK_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_RXDATA_OUT | out std_logic_vector ( 31 downto 0 ) |
| MGT0_RXDISPERR_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_RXNOTINTABLE_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_RXRUNDISP_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_TXBYPASS8B10B_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT0_TXCHARDISPMODE_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT0_TXCHARDISPVAL_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT0_TXCHARISK_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT0_TXDATA_IN | in std_logic_vector ( 31 downto 0 ) |
| MGT0_TXKERR_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_TXRUNDISP_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT0_ACTIVE_OUT | out std_logic |
| MGT0_DISABLE_IN | in std_logic |
| MGT0_DRP_RESET_IN | in std_logic |
| MGT0_RX_SIGNAL_DETECT_IN | in std_logic |
| MGT0_TX_SIGNAL_DETECT_IN | in std_logic |
| MGT0_RXCLKSTABLE_IN | in std_logic |
| MGT0_TXCLKSTABLE_IN | in std_logic |
| MGT0_DADDR_IN | in std_logic_vector ( 7 downto 0 ) |
| MGT0_DCLK_IN | in std_logic |
| MGT0_DEN_IN | in std_logic |
| MGT0_DI_IN | in std_logic_vector ( 15 downto 0 ) |
| MGT0_DO_OUT | out std_logic_vector ( 15 downto 0 ) |
| MGT0_DRDY_OUT | out std_logic |
| MGT0_DWE_IN | in std_logic |
| MGT0_LOOPBACK_IN | in std_logic_vector ( 1 downto 0 ) |
| MGT0_POWERDOWN_IN | in std_logic |
| MGT0_TXINHIBIT_IN | in std_logic |
| MGT0_RXSIGDET_OUT | out std_logic |
| MGT0_TXENOOB_IN | in std_logic |
| MGT0_RXLOCK_OUT | out std_logic |
| MGT0_TXLOCK_OUT | out std_logic |
| MGT0_RXPOLARITY_IN | in std_logic |
| MGT0_TXPOLARITY_IN | in std_logic |
| MGT0_COMBUSIN_IN | in std_logic_vector ( 15 downto 0 ) |
| MGT0_COMBUSOUT_OUT | out std_logic_vector ( 15 downto 0 ) |
| MGT0_REFCLK1_IN | in std_logic |
| MGT0_RXPMARESET_IN | in std_logic |
| MGT0_RXRESET_IN | in std_logic |
| MGT0_TXPMARESET_IN | in std_logic |
| MGT0_TXRESET_IN | in std_logic |
| MGT0_ENMCOMMAALIGN_IN | in std_logic |
| MGT0_ENPCOMMAALIGN_IN | in std_logic |
| MGT0_RXCOMMADET_OUT | out std_logic |
| MGT0_RXREALIGN_OUT | out std_logic |
| MGT0_RX1N_IN | in std_logic |
| MGT0_RX1P_IN | in std_logic |
| MGT0_TX1N_OUT | out std_logic |
| MGT0_TX1P_OUT | out std_logic |
| MGT0_RXSTATUS_OUT | out std_logic_vector ( 5 downto 0 ) |
| MGT0_RXSYNC_IN | in std_logic |
| MGT0_TXSYNC_IN | in std_logic |
| MGT0_RXRECCLK1_OUT | out std_logic |
| MGT0_RXRECCLK2_OUT | out std_logic |
| MGT0_RXUSRCLK2_IN | in std_logic |
| MGT0_TXOUTCLK1_OUT | out std_logic |
| MGT0_TXOUTCLK2_OUT | out std_logic |
| MGT0_TXUSRCLK2_IN | in std_logic |
| MGT1_RXCHARISCOMMA_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_RXCHARISK_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_RXDATA_OUT | out std_logic_vector ( 31 downto 0 ) |
| MGT1_RXDISPERR_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_RXNOTINTABLE_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_RXRUNDISP_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_TXBYPASS8B10B_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT1_TXCHARDISPMODE_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT1_TXCHARDISPVAL_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT1_TXCHARISK_IN | in std_logic_vector ( 3 downto 0 ) |
| MGT1_TXDATA_IN | in std_logic_vector ( 31 downto 0 ) |
| MGT1_TXKERR_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_TXRUNDISP_OUT | out std_logic_vector ( 3 downto 0 ) |
| MGT1_ACTIVE_OUT | out std_logic |
| MGT1_DISABLE_IN | in std_logic |
| MGT1_DRP_RESET_IN | in std_logic |
| MGT1_RX_SIGNAL_DETECT_IN | in std_logic |
| MGT1_TX_SIGNAL_DETECT_IN | in std_logic |
| MGT1_RXCLKSTABLE_IN | in std_logic |
| MGT1_TXCLKSTABLE_IN | in std_logic |
| MGT1_DADDR_IN | in std_logic_vector ( 7 downto 0 ) |
| MGT1_DCLK_IN | in std_logic |
| MGT1_DEN_IN | in std_logic |
| MGT1_DI_IN | in std_logic_vector ( 15 downto 0 ) |
| MGT1_DO_OUT | out std_logic_vector ( 15 downto 0 ) |
| MGT1_DRDY_OUT | out std_logic |
| MGT1_DWE_IN | in std_logic |
| MGT1_LOOPBACK_IN | in std_logic_vector ( 1 downto 0 ) |
| MGT1_POWERDOWN_IN | in std_logic |
| MGT1_TXINHIBIT_IN | in std_logic |
| MGT1_RXSIGDET_OUT | out std_logic |
| MGT1_TXENOOB_IN | in std_logic |
| MGT1_RXLOCK_OUT | out std_logic |
| MGT1_TXLOCK_OUT | out std_logic |
| MGT1_RXPOLARITY_IN | in std_logic |
| MGT1_TXPOLARITY_IN | in std_logic |
| MGT1_COMBUSIN_IN | in std_logic_vector ( 15 downto 0 ) |
| MGT1_COMBUSOUT_OUT | out std_logic_vector ( 15 downto 0 ) |
| MGT1_REFCLK1_IN | in std_logic |
| MGT1_RXPMARESET_IN | in std_logic |
| MGT1_RXRESET_IN | in std_logic |
| MGT1_TXPMARESET_IN | in std_logic |
| MGT1_TXRESET_IN | in std_logic |
| MGT1_ENMCOMMAALIGN_IN | in std_logic |
| MGT1_ENPCOMMAALIGN_IN | in std_logic |
| MGT1_RXCOMMADET_OUT | out std_logic |
| MGT1_RXREALIGN_OUT | out std_logic |
| MGT1_RX1N_IN | in std_logic |
| MGT1_RX1P_IN | in std_logic |
| MGT1_TX1N_OUT | out std_logic |
| MGT1_TX1P_OUT | out std_logic |
| MGT1_RXSTATUS_OUT | out std_logic_vector ( 5 downto 0 ) |
| MGT1_RXSYNC_IN | in std_logic |
| MGT1_TXSYNC_IN | in std_logic |
| MGT1_RXRECCLK1_OUT | out std_logic |
| MGT1_RXRECCLK2_OUT | out std_logic |
| MGT1_RXUSRCLK2_IN | in std_logic |
| MGT1_TXOUTCLK1_OUT | out std_logic |
| MGT1_TXOUTCLK2_OUT | out std_logic |
| MGT1_TXUSRCLK2_IN | in std_logic |
Detailed Description
SATA RocketIO wrapper.Definition at line 56 of file rocketio_sata.vhd.
Member Data Documentation
ieee library [Library] |
MGT0_GT11_MODE_P string := " b " [Generic] |
MGT0_MGT_ID_P integer := 1 [Generic] |
MGT1_GT11_MODE_P string := " a " [Generic] |
MGT1_MGT_ID_P integer := 0 [Generic] |
numeric_std package [Package] |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
Definition at line 47 of file rocketio_sata.vhd.
RX_FD_EN_P std_logic := ' 1 ' [Generic] |
RX_FD_MIN_P std_logic_vector ( 10 downto 0 ) := " 00001001101 " [Generic] |
RX_FD_WIDTH_P integer := 11 [Generic] |
SIMULATION_P integer := 0 [Generic] |
std_logic_1164 package [Package] |
TX_FD_EN_P std_logic := ' 1 ' [Generic] |
TX_FD_MIN_P std_logic_vector ( 10 downto 0 ) := " 00001001101 " [Generic] |
TX_FD_WIDTH_P integer := 11 [Generic] |
unisim library [Library] |
vcomponents package [Package] |
The documentation for this class was generated from the following file:
