temac.vhd

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--**************************************************************
--*                                                            *
--*     The source code for the ATLAS BCM "AAA" FPGA is made   *
--*     available via the GNU General Public License (GPL)     *
--*     unless otherwise stated below.                         *
--*                                                            *
--*     In case of problems/questions/bug reports etc. please  *
--*     contact michael.niegl@cern.ch                          *
--*                                                            *
--**************************************************************

--**************************************************************
--*                                                            *
--*  $Source: /local/reps/bcmfpga/bcm_aaa/bcm_aaa/eth/temac.vhd,v $
--*  $Revision: 2.2.2.3 $                                          *
--*  $Name: dev $                                                 *
--*  $Author: mniegl $                                         *
--*  $Date: 2008/11/03 17:57:46 $                              *


--*                                                            *
--**************************************************************
--------------------------------------------------------------------------------
--      Project:  Virtex-4 FX Ethernet MAC Wrappers
--
--         Date:  $Date: 2008/11/03 17:57:46 $
--          Tag:  $Name: dev $
--         File:  $RCSfile: temac.vhd,v $
--          Rev:  $Revision: 2.2.2.3 $
--
--      Company:  Xilinx
-- Contributors:  M. Low
--
--   Disclaimer:  XILINX IS PROVIDING THIS DESIGN, CODE, OR
--                INFORMATION "AS IS" SOLELY FOR USE IN DEVELOPING
--                PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY
--                PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
--                ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
--                APPLICATION OR STANDARD, XILINX IS MAKING NO
--                REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
--                FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE
--                RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY
--                REQUIRE FOR YOUR IMPLEMENTATION.  XILINX
--                EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH
--                RESPECT TO THE ADEQUACY OF THE IMPLEMENTATION,
--                INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
--                REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
--                FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES
--                OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
--                PURPOSE.
--
--                (c) Copyright 2004 Xilinx, Inc.
--                All rights reserved.
--
--------------------------------------------------------------------------------
--
--  temac
--
--  Author: Mary Low
--          Xilinx - Embedded Networking System Engineering Group
--
-- Description:  This is the top level VHDL wrapper for the Virtex-4 FX 
--               Ethernet MAC.
--


library unisim;

use unisim.vcomponents.all;


library ieee;

use ieee.std_logic_1164.all;

--------------------------------------------------------------------------------
-- The entity declaration for the top level wrapper.
--------------------------------------------------------------------------------


entity xtemac is
  port(
    -- Client Receiver Interface - EMAC0
    EMAC0CLIENTRXCLIENTCLKOUT : out std_logic;
    CLIENTEMAC0RXCLIENTCLKIN  : in  std_logic;
    EMAC0CLIENTRXD            : out std_logic_vector(7 downto 0);
    EMAC0CLIENTRXDVLD         : out std_logic;
    EMAC0CLIENTRXDVLDMSW      : out std_logic;
    EMAC0CLIENTRXGOODFRAME    : out std_logic;
    EMAC0CLIENTRXBADFRAME     : out std_logic;
    EMAC0CLIENTRXFRAMEDROP    : out std_logic;
    EMAC0CLIENTRXDVREG6       : out std_logic;
    EMAC0CLIENTRXSTATS        : out std_logic_vector(6 downto 0);
    EMAC0CLIENTRXSTATSVLD     : out std_logic;
    EMAC0CLIENTRXSTATSBYTEVLD : out std_logic;

    -- Client Transmitter Interface - EMAC0
    EMAC0CLIENTTXCLIENTCLKOUT : out std_logic;
    CLIENTEMAC0TXCLIENTCLKIN  : in  std_logic;
    CLIENTEMAC0TXD            : in  std_logic_vector(7 downto 0);
    CLIENTEMAC0TXDVLD         : in  std_logic;
    CLIENTEMAC0TXDVLDMSW      : in  std_logic;
    EMAC0CLIENTTXACK          : out std_logic;
    CLIENTEMAC0TXFIRSTBYTE    : in  std_logic;
    CLIENTEMAC0TXUNDERRUN     : in  std_logic;
    EMAC0CLIENTTXCOLLISION    : out std_logic;
    EMAC0CLIENTTXRETRANSMIT   : out std_logic;
    CLIENTEMAC0TXIFGDELAY     : in  std_logic_vector(7 downto 0);
    EMAC0CLIENTTXSTATS        : out std_logic;
    EMAC0CLIENTTXSTATSVLD     : out std_logic;
    EMAC0CLIENTTXSTATSBYTEVLD : out std_logic;

    -- MAC Control Interface - EMAC0
    CLIENTEMAC0PAUSEREQ : in std_logic;
    CLIENTEMAC0PAUSEVAL : in std_logic_vector(15 downto 0);

    -- Clock Signal - EMAC0
    GTX_CLK_0                  : in  std_logic;
    EMAC0CLIENTTXGMIIMIICLKOUT : out std_logic;
    CLIENTEMAC0TXGMIIMIICLKIN  : in  std_logic;

    -- GMII Interface - EMAC0
    GMII_TXD_0    : out std_logic_vector(7 downto 0);
    GMII_TX_EN_0  : out std_logic;
    GMII_TX_ER_0  : out std_logic;
    GMII_TX_CLK_0 : out std_logic;
    GMII_RXD_0    : in  std_logic_vector(7 downto 0);
    GMII_RX_DV_0  : in  std_logic;
    GMII_RX_ER_0  : in  std_logic;
    GMII_RX_CLK_0 : in  std_logic;
    MII_TX_CLK_0  : in  std_logic;
    GMII_COL_0    : in  std_logic;
    GMII_CRS_0    : in  std_logic;

    -- MDIO Interface - EMAC0
    MDC_0      : out std_logic;
    MDIO_IN_0  : in  std_logic;
    MDIO_OUT_0 : out std_logic;
    MDIO_TRI_0 : out std_logic;

    HOSTCLK : in std_logic;

    -- Asynchronous Reset
    RESET : in std_logic
    );

end xtemac;


architecture WRAPPER of xtemac is

  --************************** Signals Declarations **************************
  signal gnd_i     : std_logic;
  signal gnd_v48_i : std_logic_vector(47 downto 0);
  signal vcc_i     : std_logic;

  signal client_rx_data_0_i : std_logic_vector(15 downto 0);
  signal client_tx_data_0_i : std_logic_vector(15 downto 0);

  signal tieemac0configvector_i         : std_logic_vector(79 downto 0);
  signal phy_config_vector_0_i          : std_logic_vector(4 downto 0);
  signal has_mdio_0_i                   : std_logic;
  signal speed_0_i                      : std_logic_vector(1 downto 0);
  signal has_rgmii_0_i                  : std_logic;
  signal has_sgmii_0_i                  : std_logic;
  signal has_gpcs_0_i                   : std_logic;
  signal has_host_0_i                   : std_logic;
  signal tx_client_16_0_i               : std_logic;
  signal rx_client_16_0_i               : std_logic;
  signal addr_filter_enable_0_i         : std_logic;
  signal rx_lt_check_dis_0_i            : std_logic;
  signal flow_control_config_vector_0_i : std_logic_vector(1 downto 0);
  signal tx_config_vector_0_i           : std_logic_vector(6 downto 0);
  signal rx_config_vector_0_i           : std_logic_vector(5 downto 0);
  signal pause_address_0_i              : std_logic_vector(47 downto 0);

  signal hostreq         : std_logic                     := '0';
  constant host_MIIM_sel : std_logic                     := '0';
  signal host_MIIM_rdy   : std_logic                     := '0';
  constant hostOpCode    : std_logic_vector(1 downto 0)  := "11";
  signal hostaddr        : std_logic_vector(9 downto 0)  := (others => '0');
  signal hostdata_in     : std_logic_vector(31 downto 0) := (others => '0');
  signal hostdata_out    : std_logic_vector(31 downto 0) := (others => '0');

begin

  --**************************** Main Body of Code ***************************
  gnd_i     <= '0';
  gnd_v48_i <= "000000000000000000000000000000000000000000000000";
  vcc_i     <= '1';

  -- 8-bit client data on EMAC0
  EMAC0CLIENTRXD     <= client_rx_data_0_i(7 downto 0);
  client_tx_data_0_i <= "00000000" & CLIENTEMAC0TXD;


  ----------------------------------------------------------------------------
  -- Construct the tie-off vector
  -- tieemac#conficvector_i[79]: Reserved - Tie to "1"
  -- tieemac#configvector_i[78:74]: phy_configuration_vector[4:0] that is used
  --     to configure the PCS/PMA either when the MDIO is not present or as
  --     initial values loaded upon reset that can be modified through the
  --     MDIO.
  -- tieemac#configvector_i[73:65]: tie_off_vector[8:0] that is used to 
  --     configure the mode of the EMAC.
  -- tieemac#configvector_i[64:0]  mac_configuration_vector[64:0] that is used
  --     to configure the EMAC either when the Host interface is not present
  --     or as initial values loaded upon reset that can be modified through
  --     the Host interface.
  ----------------------------------------------------------------------------
  -- EMAC0
  tieemac0configvector_i <= vcc_i & phy_config_vector_0_i &
                            has_mdio_0_i &
                            speed_0_i &
                            has_rgmii_0_i &
                            has_sgmii_0_i &
                            has_gpcs_0_i &
                            has_host_0_i &
                            tx_client_16_0_i &
                            rx_client_16_0_i &
                            addr_filter_enable_0_i &
                            rx_lt_check_dis_0_i &
                            flow_control_config_vector_0_i &
                            tx_config_vector_0_i &
                            rx_config_vector_0_i &
                            pause_address_0_i;

  phy_config_vector_0_i <= "00000";

  has_mdio_0_i                      <= vcc_i;
  speed_0_i                         <= "01";
  has_rgmii_0_i                     <= gnd_i;
  has_sgmii_0_i                     <= gnd_i;
  has_gpcs_0_i                      <= gnd_i;
  has_host_0_i                      <= '0';
  tx_client_16_0_i                  <= gnd_i;
  rx_client_16_0_i                  <= gnd_i;
  addr_filter_enable_0_i            <= gnd_i;
  rx_lt_check_dis_0_i               <= gnd_i;
  flow_control_config_vector_0_i(1) <= gnd_i;
  flow_control_config_vector_0_i(0) <= gnd_i;
  tx_config_vector_0_i(6)           <= gnd_i;
  tx_config_vector_0_i(5)           <= gnd_i;
  tx_config_vector_0_i(4)           <= gnd_i;
  tx_config_vector_0_i(3)           <= vcc_i;
  tx_config_vector_0_i(2)           <= gnd_i;
  tx_config_vector_0_i(1)           <= gnd_i;
  tx_config_vector_0_i(0)           <= gnd_i;
  rx_config_vector_0_i(5)           <= gnd_i;
  rx_config_vector_0_i(4)           <= gnd_i;
  rx_config_vector_0_i(3)           <= gnd_i;
  rx_config_vector_0_i(2)           <= vcc_i;
  rx_config_vector_0_i(1)           <= gnd_i;
  rx_config_vector_0_i(0)           <= gnd_i;
  pause_address_0_i                 <= gnd_v48_i;
  hostreq                           <= '0';
  hostdata_out                      <= (others => '0');


  ----------------------------------------------------------------------------
  -- Instantiate V4 EMAC
  ----------------------------------------------------------------------------

  v4_emac : EMAC
    port map (
      RESET => RESET,

      -- EMAC0
      EMAC0CLIENTRXCLIENTCLKOUT => EMAC0CLIENTRXCLIENTCLKOUT,
      CLIENTEMAC0RXCLIENTCLKIN  => CLIENTEMAC0RXCLIENTCLKIN,
      EMAC0CLIENTRXD            => client_rx_data_0_i,
      EMAC0CLIENTRXDVLD         => EMAC0CLIENTRXDVLD,
      EMAC0CLIENTRXDVLDMSW      => EMAC0CLIENTRXDVLDMSW,
      EMAC0CLIENTRXGOODFRAME    => EMAC0CLIENTRXGOODFRAME,
      EMAC0CLIENTRXBADFRAME     => EMAC0CLIENTRXBADFRAME,
      EMAC0CLIENTRXFRAMEDROP    => EMAC0CLIENTRXFRAMEDROP,
      EMAC0CLIENTRXDVREG6       => EMAC0CLIENTRXDVREG6,
      EMAC0CLIENTRXSTATS        => EMAC0CLIENTRXSTATS,
      EMAC0CLIENTRXSTATSVLD     => EMAC0CLIENTRXSTATSVLD,
      EMAC0CLIENTRXSTATSBYTEVLD => EMAC0CLIENTRXSTATSBYTEVLD,

      EMAC0CLIENTTXCLIENTCLKOUT => EMAC0CLIENTTXCLIENTCLKOUT,
      CLIENTEMAC0TXCLIENTCLKIN  => CLIENTEMAC0TXCLIENTCLKIN,
      CLIENTEMAC0TXD            => client_tx_data_0_i,
      CLIENTEMAC0TXDVLD         => CLIENTEMAC0TXDVLD,
      CLIENTEMAC0TXDVLDMSW      => CLIENTEMAC0TXDVLDMSW,
      EMAC0CLIENTTXACK          => EMAC0CLIENTTXACK,
      CLIENTEMAC0TXFIRSTBYTE    => CLIENTEMAC0TXFIRSTBYTE,
      CLIENTEMAC0TXUNDERRUN     => CLIENTEMAC0TXUNDERRUN,
      EMAC0CLIENTTXCOLLISION    => EMAC0CLIENTTXCOLLISION,
      EMAC0CLIENTTXRETRANSMIT   => EMAC0CLIENTTXRETRANSMIT,
      CLIENTEMAC0TXIFGDELAY     => CLIENTEMAC0TXIFGDELAY,
      EMAC0CLIENTTXSTATS        => EMAC0CLIENTTXSTATS,
      EMAC0CLIENTTXSTATSVLD     => EMAC0CLIENTTXSTATSVLD,
      EMAC0CLIENTTXSTATSBYTEVLD => EMAC0CLIENTTXSTATSBYTEVLD,

      CLIENTEMAC0PAUSEREQ => CLIENTEMAC0PAUSEREQ,
      CLIENTEMAC0PAUSEVAL => CLIENTEMAC0PAUSEVAL,

      PHYEMAC0GTXCLK             => GTX_CLK_0,
      EMAC0CLIENTTXGMIIMIICLKOUT => EMAC0CLIENTTXGMIIMIICLKOUT,
      CLIENTEMAC0TXGMIIMIICLKIN  => CLIENTEMAC0TXGMIIMIICLKIN,

      PHYEMAC0RXCLK    => GMII_RX_CLK_0,
      PHYEMAC0RXD      => GMII_RXD_0,
      PHYEMAC0RXDV     => GMII_RX_DV_0,
      PHYEMAC0RXER     => GMII_RX_ER_0,
      EMAC0PHYTXCLK    => GMII_TX_CLK_0,
      EMAC0PHYTXD      => GMII_TXD_0,
      EMAC0PHYTXEN     => GMII_TX_EN_0,
      EMAC0PHYTXER     => GMII_TX_ER_0,
      PHYEMAC0MIITXCLK => MII_TX_CLK_0,
      PHYEMAC0COL      => GMII_COL_0,
      PHYEMAC0CRS      => GMII_CRS_0,

      CLIENTEMAC0DCMLOCKED   => vcc_i,
      EMAC0CLIENTANINTERRUPT => open,
      PHYEMAC0SIGNALDET      => gnd_i,
      PHYEMAC0PHYAD          => "00000",
      EMAC0PHYENCOMMAALIGN   => open,
      EMAC0PHYLOOPBACKMSB    => open,
      EMAC0PHYMGTRXRESET     => open,
      EMAC0PHYMGTTXRESET     => open,
      EMAC0PHYPOWERDOWN      => open,
      EMAC0PHYSYNCACQSTATUS  => open,
      PHYEMAC0RXCLKCORCNT    => gnd_v48_i (2 downto 0),
      PHYEMAC0RXBUFSTATUS    => gnd_v48_i(1 downto 0),
      PHYEMAC0RXBUFERR       => gnd_i,
      PHYEMAC0RXCHARISCOMMA  => gnd_i,
      PHYEMAC0RXCHARISK      => gnd_i,
      PHYEMAC0RXCHECKINGCRC  => gnd_i,
      PHYEMAC0RXCOMMADET     => gnd_i,
      PHYEMAC0RXDISPERR      => gnd_i,
      PHYEMAC0RXLOSSOFSYNC   => gnd_v48_i (1 downto 0),
      PHYEMAC0RXNOTINTABLE   => gnd_i,
      PHYEMAC0RXRUNDISP      => gnd_i,
      PHYEMAC0TXBUFERR       => gnd_i,
      EMAC0PHYTXCHARDISPMODE => open,
      EMAC0PHYTXCHARDISPVAL  => open,
      EMAC0PHYTXCHARISK      => open,

      EMAC0PHYMCLKOUT => MDC_0,
      PHYEMAC0MCLKIN  => gnd_i,
      PHYEMAC0MDIN     => MDIO_IN_0,
      EMAC0PHYMDOUT   => MDIO_OUT_0,
      EMAC0PHYMDTRI   => MDIO_TRI_0,

      TIEEMAC0CONFIGVEC    => tieemac0configvector_i ,
      TIEEMAC0UNICASTADDR => gnd_v48_i,

      -- EMAC1
      EMAC1CLIENTRXCLIENTCLKOUT => open,
      CLIENTEMAC1RXCLIENTCLKIN  => gnd_i,
      EMAC1CLIENTRXD            => open,
      EMAC1CLIENTRXDVLD         => open,
      EMAC1CLIENTRXDVLDMSW      => open,
      EMAC1CLIENTRXGOODFRAME    => open,
      EMAC1CLIENTRXBADFRAME     => open,
      EMAC1CLIENTRXFRAMEDROP    => open,
      EMAC1CLIENTRXDVREG6       => open,
      EMAC1CLIENTRXSTATS        => open,
      EMAC1CLIENTRXSTATSVLD     => open,
      EMAC1CLIENTRXSTATSBYTEVLD => open,

      EMAC1CLIENTTXCLIENTCLKOUT => open,
      CLIENTEMAC1TXCLIENTCLKIN  => gnd_i,
      CLIENTEMAC1TXD            => gnd_v48_i(15 downto 0),
      CLIENTEMAC1TXDVLD         => gnd_i,
      CLIENTEMAC1TXDVLDMSW      => gnd_i,
      EMAC1CLIENTTXACK          => open,
      CLIENTEMAC1TXFIRSTBYTE    => gnd_i,
      CLIENTEMAC1TXUNDERRUN     => gnd_i,
      EMAC1CLIENTTXCOLLISION    => open,
      EMAC1CLIENTTXRETRANSMIT   => open,
      CLIENTEMAC1TXIFGDELAY     => gnd_v48_i(7 downto 0),
      EMAC1CLIENTTXSTATS        => open,
      EMAC1CLIENTTXSTATSVLD     => open,
      EMAC1CLIENTTXSTATSBYTEVLD => open,

      CLIENTEMAC1PAUSEREQ => gnd_i,
      CLIENTEMAC1PAUSEVAL => gnd_v48_i(15 downto 0),

      PHYEMAC1GTXCLK             => gnd_i,
      EMAC1CLIENTTXGMIIMIICLKOUT => open,
      CLIENTEMAC1TXGMIIMIICLKIN  => gnd_i,

      PHYEMAC1RXCLK    => gnd_i,
      PHYEMAC1RXD      => gnd_v48_i(7 downto 0),
      PHYEMAC1RXDV     => gnd_i,
      PHYEMAC1RXER     => gnd_i,
      PHYEMAC1MIITXCLK => gnd_i,
      EMAC1PHYTXCLK    => open,
      EMAC1PHYTXD      => open,
      EMAC1PHYTXEN     => open,
      EMAC1PHYTXER     => open,
      PHYEMAC1COL      => gnd_i,
      PHYEMAC1CRS      => gnd_i,

      CLIENTEMAC1DCMLOCKED   => vcc_i,
      EMAC1CLIENTANINTERRUPT => open,

      PHYEMAC1SIGNALDET      => gnd_i,
      PHYEMAC1PHYAD          => "00010",
      EMAC1PHYENCOMMAALIGN   => open,
      EMAC1PHYLOOPBACKMSB    => open,
      EMAC1PHYMGTRXRESET     => open,
      EMAC1PHYMGTTXRESET     => open,
      EMAC1PHYPOWERDOWN      => open,
      EMAC1PHYSYNCACQSTATUS  => open,
      PHYEMAC1RXCLKCORCNT    => gnd_v48_i (2 downto 0),
      PHYEMAC1RXBUFSTATUS    => gnd_v48_i(1 downto 0),
      PHYEMAC1RXBUFERR       => gnd_i,
      PHYEMAC1RXCHARISCOMMA  => gnd_i,
      PHYEMAC1RXCHARISK      => gnd_i,
      PHYEMAC1RXCHECKINGCRC  => gnd_i,
      PHYEMAC1RXCOMMADET     => gnd_i,
      PHYEMAC1RXDISPERR      => gnd_i,
      PHYEMAC1RXLOSSOFSYNC   => gnd_v48_i (1 downto 0),
      PHYEMAC1RXNOTINTABLE   => gnd_i,
      PHYEMAC1RXRUNDISP      => gnd_i,
      PHYEMAC1TXBUFERR       => gnd_i,
      EMAC1PHYTXCHARDISPMODE => open,
      EMAC1PHYTXCHARDISPVAL  => open,
      EMAC1PHYTXCHARISK      => open,

      EMAC1PHYMCLKOUT => open,
      PHYEMAC1MCLKIN  => gnd_i,
      PHYEMAC1MDIN    => gnd_i,
      EMAC1PHYMDOUT   => open,
      EMAC1PHYMDTRI   => open,

      TIEEMAC1CONFIGVEC   => (others => '0'),
      TIEEMAC1UNICASTADDR => gnd_v48_i,

      -- Host Interface 
      HOSTCLK      => HOSTCLK,
      HOSTOPCODE   => hostOpCode,
      HOSTREQ      => hostreq,
      HOSTMIIMSEL  => host_MIIM_sel,
      HOSTADDR     => hostaddr,
      HOSTWRDATA   => hostdata_out,
      HOSTMIIMRDY  => host_MIIM_rdy,
      HOSTRDDATA   => hostdata_in,
      HOSTEMAC1SEL => '0',              -- EMAC 0 only

      -- DCR Interface
      DCREMACCLK    => gnd_i,
      DCREMACABUS   => gnd_v48_i(1 downto 0),
      DCREMACREAD   => gnd_i,
      DCREMACWRITE  => gnd_i,
      DCREMACDBUS   => gnd_v48_i(31 downto 0),
      EMACDCRACK    => open,
      EMACDCRDBUS   => open,
      DCREMACENABLE => gnd_i,           -- do not use 
      DCRHOSTDONEIR => open
      );

end WRAPPER;

---

Author: M.Niegl

Generated on Tue Nov 4 00:47:06 2008 for BCM-AAA by  1.5.7.1-20081012