prescaler.vhd

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--**************************************************************
--*                                                            *
--*     The source code for the ATLAS BCM "AAA" FPGA is made   *
--*     available via the GNU General Public License (GPL)     *
--*     unless otherwise stated below.                         *
--*                                                            *
--*     In case of problems/questions/bug reports etc. please  *
--*     contact michael.niegl@cern.ch                          *
--*                                                            *
--**************************************************************

--**************************************************************
--*                                                            *
--*  $Source: /local/reps/bcmfpga/bcm_aaa/bcm_aaa/div/prescaler.vhd,v $
--*  $Revision: 1.7.2.3 $                                          *
--*  $Name: dev $                                             *
--*  $Author: mniegl $                                         *
--*  $Date: 2008/11/03 17:57:45 $                              *


--*                                                            *
--**************************************************************
----------------------------------------------------------------------------------

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_arith.all;

use ieee.std_logic_unsigned.all;


entity prescaler is
  generic (divider : integer range 0 to 127 := 10);
  port (CLK : in  std_logic;
        CE  : in  std_logic;
        R   : in  std_logic;
        TC  : out std_logic
        );
end prescaler;


architecture prescaler_arc of prescaler is

  signal cnt     : integer range 0 to 127;
  signal clk_out : std_logic := '0';

begin

  TC <= clk_out;

  process (CLK)
  begin
    if clk'event and clk = '1' then
      if R = '1' then
        cnt     <= 0;
        clk_out <= '0';
      elsif CE = '1' then
        cnt <= cnt+1;
        if cnt = (divider-1)/2 then
          cnt     <= 0;
          clk_out <= not clk_out;
        end if;
      end if;
    end if;
  end process;

end prescaler_arc;

---

Author: M.Niegl

Generated on Tue Nov 4 00:47:05 2008 for BCM-AAA by  1.5.7.1-20081012