Architectures | |
loop_cnt_sh_arc | Architecture |
Continous counter, 6 bit. More... | |
Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
std_logic_arith | |
arithmetic operations on std_logic datatypes, see file | |
std_logic_unsigned | |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file | |
numeric_std | |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file | |
Ports | |
CLK | in std_logic |
Clock. | |
EN | in std_logic |
Enable. | |
RESET | in std_logic |
Reset. | |
Y | out std_logic_vector ( 5 downto 0 ) |
Counter value out. |
Definition at line 37 of file loop_cnt_sh.vhd.
CLK in std_logic [Port] |
EN in std_logic [Port] |
ieee library [Library] |
numeric_std package [Package] |
arithmetic functions use ieee.numeric_std.all; operators for signed use ieee.numeric_std.all; unsigned datatypes, see file
Definition at line 34 of file loop_cnt_sh.vhd.
RESET in std_logic [Port] |
std_logic_1164 package [Package] |
std_logic_arith package [Package] |
arithmetic operations on std_logic datatypes, see file
Definition at line 30 of file loop_cnt_sh.vhd.
std_logic_unsigned package [Package] |
unsigned functions use ieee.std_logic_unsigned.all; operators for std_logic_vector type, see file
Definition at line 32 of file loop_cnt_sh.vhd.
Y out std_logic_vector ( 5 downto 0 ) [Port] |