Libraries | |
ieee | |
standard IEEE library | |
Packages | |
std_logic_1164 | |
std_logic definitions, see file | |
Constants | |
ch_a_c | std_logic_vector ( 7 downto 0 ) := " 01000001 " |
Declare constants. | |
ch_b_c | std_logic_vector ( 7 downto 0 ) := " 01000010 " |
ch_c_c | std_logic_vector ( 7 downto 0 ) := " 01000011 " |
ch_d_c | std_logic_vector ( 7 downto 0 ) := " 01000100 " |
ch_e_c | std_logic_vector ( 7 downto 0 ) := " 01000101 " |
ch_f_c | std_logic_vector ( 7 downto 0 ) := " 01000110 " |
ch_g_c | std_logic_vector ( 7 downto 0 ) := " 01000111 " |
ch_h_c | std_logic_vector ( 7 downto 0 ) := " 01001000 " |
ch_i_c | std_logic_vector ( 7 downto 0 ) := " 01001001 " |
ch_j_c | std_logic_vector ( 7 downto 0 ) := " 01001010 " |
ch_k_c | std_logic_vector ( 7 downto 0 ) := " 01001010 " |
ch_l_c | std_logic_vector ( 7 downto 0 ) := " 01001100 " |
ch_m_c | std_logic_vector ( 7 downto 0 ) := " 01001101 " |
ch_n_c | std_logic_vector ( 7 downto 0 ) := " 01001110 " |
ch_o_c | std_logic_vector ( 7 downto 0 ) := " 01001111 " |
ch_p_c | std_logic_vector ( 7 downto 0 ) := " 01010000 " |
ch_q_c | std_logic_vector ( 7 downto 0 ) := " 01010001 " |
ch_r_c | std_logic_vector ( 7 downto 0 ) := " 01010010 " |
ch_s_c | std_logic_vector ( 7 downto 0 ) := " 01010011 " |
ch_t_c | std_logic_vector ( 7 downto 0 ) := " 01010100 " |
ch_u_c | std_logic_vector ( 7 downto 0 ) := " 01010101 " |
ch_v_c | std_logic_vector ( 7 downto 0 ) := " 01010110 " |
ch_w_c | std_logic_vector ( 7 downto 0 ) := " 01010111 " |
ch_x_c | std_logic_vector ( 7 downto 0 ) := " 01011000 " |
ch_y_c | std_logic_vector ( 7 downto 0 ) := " 01011001 " |
ch_z_c | std_logic_vector ( 7 downto 0 ) := " 01011010 " |
ch_a | std_logic_vector ( 7 downto 0 ) := " 01100001 " |
ch_b | std_logic_vector ( 7 downto 0 ) := " 01100010 " |
ch_c | std_logic_vector ( 7 downto 0 ) := " 01100011 " |
ch_d | std_logic_vector ( 7 downto 0 ) := " 01100100 " |
ch_e | std_logic_vector ( 7 downto 0 ) := " 01100101 " |
ch_f | std_logic_vector ( 7 downto 0 ) := " 01100110 " |
ch_g | std_logic_vector ( 7 downto 0 ) := " 01100111 " |
ch_h | std_logic_vector ( 7 downto 0 ) := " 01101000 " |
ch_i | std_logic_vector ( 7 downto 0 ) := " 01101001 " |
ch_j | std_logic_vector ( 7 downto 0 ) := " 01101010 " |
ch_k | std_logic_vector ( 7 downto 0 ) := " 01101011 " |
ch_l | std_logic_vector ( 7 downto 0 ) := " 01101100 " |
ch_m | std_logic_vector ( 7 downto 0 ) := " 01101101 " |
ch_n | std_logic_vector ( 7 downto 0 ) := " 01101110 " |
ch_o | std_logic_vector ( 7 downto 0 ) := " 01101111 " |
ch_p | std_logic_vector ( 7 downto 0 ) := " 01110000 " |
ch_q | std_logic_vector ( 7 downto 0 ) := " 01110001 " |
ch_r | std_logic_vector ( 7 downto 0 ) := " 01110010 " |
ch_s | std_logic_vector ( 7 downto 0 ) := " 01110011 " |
ch_t | std_logic_vector ( 7 downto 0 ) := " 01110100 " |
ch_u | std_logic_vector ( 7 downto 0 ) := " 01110101 " |
ch_v | std_logic_vector ( 7 downto 0 ) := " 01110110 " |
ch_w | std_logic_vector ( 7 downto 0 ) := " 01110111 " |
ch_x | std_logic_vector ( 7 downto 0 ) := " 01111000 " |
ch_y | std_logic_vector ( 7 downto 0 ) := " 01111001 " |
ch_z | std_logic_vector ( 7 downto 0 ) := " 01111010 " |
ch_0 | std_logic_vector ( 7 downto 0 ) := " 00110000 " |
ch_1 | std_logic_vector ( 7 downto 0 ) := " 00110001 " |
ch_2 | std_logic_vector ( 7 downto 0 ) := " 00110010 " |
ch_3 | std_logic_vector ( 7 downto 0 ) := " 00110011 " |
ch_4 | std_logic_vector ( 7 downto 0 ) := " 00110100 " |
ch_5 | std_logic_vector ( 7 downto 0 ) := " 00110101 " |
ch_6 | std_logic_vector ( 7 downto 0 ) := " 00110110 " |
ch_7 | std_logic_vector ( 7 downto 0 ) := " 00110111 " |
ch_8 | std_logic_vector ( 7 downto 0 ) := " 00111000 " |
ch_9 | std_logic_vector ( 7 downto 0 ) := " 00111001 " |
ch_space | std_logic_vector ( 7 downto 0 ) := " 00100000 " |
ch_star | std_logic_vector ( 7 downto 0 ) := " 00101010 " |
ch_plus | std_logic_vector ( 7 downto 0 ) := " 00101011 " |
ch_minus | std_logic_vector ( 7 downto 0 ) := " 00101101 " |
ch_eq | std_logic_vector ( 7 downto 0 ) := " 00111101 " |
ch_dot | std_logic_vector ( 7 downto 0 ) := " 00101110 " |
ch_colon | std_logic_vector ( 7 downto 0 ) := " 00111010 " |
ch_excl | std_logic_vector ( 7 downto 0 ) := " 00100001 " |
ch_quest | std_logic_vector ( 7 downto 0 ) := " 00111111 " |
ch_arr_r | std_logic_vector ( 7 downto 0 ) := " 01111110 " |
ch_arr_l | std_logic_vector ( 7 downto 0 ) := " 01111111 " |
Characters are mapped to bit sequences
Definition at line 30 of file lcd_characters.vhd.
ch_a_c std_logic_vector ( 7 downto 0 ) := " 01000001 " [Constant] |
ieee library [Library] |
std_logic_1164 package [Package] |