backend_fifos_00 | ddr2_mem_user_interface_0.user_interface_arc | [Component Instantiation] |
ddr2_mem_backend_fifos_0 | ddr2_mem_user_interface_0.user_interface_arc | [Component] |
ddr2_mem_rd_data_0 | ddr2_mem_user_interface_0.user_interface_arc | [Component] |
rd_data_00 | ddr2_mem_user_interface_0.user_interface_arc | [Component Instantiation] |
read_data_fifo_fall_i (defined in ddr2_mem_user_interface_0.user_interface_arc) | ddr2_mem_user_interface_0.user_interface_arc | [Signal] |
read_data_fifo_rise_i (defined in ddr2_mem_user_interface_0.user_interface_arc) | ddr2_mem_user_interface_0.user_interface_arc | [Signal] |