ddr2_mem_parameters_0 Member List

This is the complete list of members for ddr2_mem_parameters_0, including all inherited members.

add_const1 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
add_const2 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
add_const3 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
add_const4 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
add_const5 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
additive_latency_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
bank_address (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
burst_length (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
burst_type (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cas_latency_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
chip_address (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cke_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
clk_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
col_ap_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
column_address (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_D100 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_D1000 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h0 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h1 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h2 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h3 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h5 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h6 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_h7 (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_hA (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_hB (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_hD (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_hE (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_hF (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
cs_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
Data4PerReadEnable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
Data8PerReadEnable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
data_mask (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
data_mask_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
data_strobe_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
data_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
DatabitsPerMask (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
DatabitsPerStrobe (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dcm_disable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dcm_enable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
deep_memory (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dll_ena (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dll_rst (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dm_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dq_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
dqs_n_ena (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ecc_cntrl_bits (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ecc_disable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ecc_enable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ecc_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ext_load_mode_register (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
fifo (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
foundation_ise (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
high_frequency (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ieeeddr2_mem_parameters_0 [Library]
load_mode_register (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
low_frequency (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
max_ref_cnt (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
max_ref_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
memory_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
mode (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
mrd_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
no_of_CS (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ocd_operation (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
odt_enable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
odt_width (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
op_drive_strength (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
output (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
pd_mode (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
Phy_Mode (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ras_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
rcd_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
rdqs_ena (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
ReadEnable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
registered (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
RESET (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
rfc_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
row_address (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
rp_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
STATE_MACHINE1ddr2_mem_parameters_0 [Type]
STATE_MACHINE2ddr2_mem_parameters_0 [Type]
std_logic_1164ddr2_mem_parameters_0 [Package]
std_logic_unsignedddr2_mem_parameters_0 [Package]
tb_disable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
tb_enable (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
trtp_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
twr_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
twtr_count_value (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
unbuffered (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]
write_recovery (defined in ddr2_mem_parameters_0)ddr2_mem_parameters_0 [Constant]


Author: M.Niegl
Generated on Tue Nov 4 00:50:19 2008 for BCM-AAA by doxygen 1.5.7.1-20081012