a_rxlock (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
a_txlock (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
b_rxlock (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
b_txlock (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
clock_divider | bridge.bridge_arc | [Component] |
counter_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
counter_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
counter_in_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
counter_in_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
cycle_limit (defined in bridge.bridge_arc) | bridge.bridge_arc | [Constant] |
data_delay_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
data_delay_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
data_direct_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
data_direct_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
delay_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
delay_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
last_buf_a(CLK_SATA_IN) | bridge.bridge_arc | [Process] |
last_buf_b(CLK_SATA_IN) | bridge.bridge_arc | [Process] |
last_buffer_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
last_buffer_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
output_value_a(CLK_DATA_IN) | bridge.bridge_arc | [Process] |
output_value_b(CLK_DATA_IN) | bridge.bridge_arc | [Process] |
p_bad_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
p_bad_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
p_good_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
p_good_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
package_report_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
package_report_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
phase_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
phase_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
r_a_ready (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
r_b_ready (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
rec_imp_a(CLK_SATA_IN) | bridge.bridge_arc | [Process] |
rec_imp_b(CLK_SATA_IN) | bridge.bridge_arc | [Process] |
sata | bridge.bridge_arc | [Component] |
sata_data_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_out_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_out_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_present_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_present_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_ready_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_data_ready_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_eop_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_eop_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_eop_signal_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_eop_signal_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_error_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_error_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
sata_modul (defined in bridge.bridge_arc) | bridge.bridge_arc | [Component Instantiation] |
sen_imp_a(CLK_SATA_IN) | bridge.bridge_arc | [Process] |
sen_imp_b(CLK_SATA_IN) | bridge.bridge_arc | [Process] |
state_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
state_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
state_II_a (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
state_II_b (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
states (defined in bridge.bridge_arc) | bridge.bridge_arc | [Type] |
t_a_ready (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |
t_b_ready (defined in bridge.bridge_arc) | bridge.bridge_arc | [Signal] |